Microchip Technology, Inc. Datasheets for Logic Level Translators

Logic level translators adapt or convert one voltage or logic level to another.
Logic Level Translators: Learn more

Product Name Notes
Clock and Data Distribution -- SY100ELT23L The 100ELT23L are dual differential LVPECL-to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead...
Clock and Data Distribution -- SY100ELT21L The SY10/100ELT21L are single differential LVPECLto- LVTTL translators using a single +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The...
Clock and Data Distribution -- SY100ELT22 The SY10/100ELT22 are dual TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew,...
Clock and Data Distribution -- SY100ELT22L The SY10/100ELT22L are dual TTL-to-differential PECL translators with +3.3V power supply. Because PECL (Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8-lead SOIC package...
Clock and Data Distribution -- SY100EPT20 The SY10/100EPT20 is a TTL/CMOS to differential PECL translator. Capable of running from a 3.3 or 5V supply, the part can be used in either LVTTL/LVCMOS/ LVPECL or TTL/CMOS/PECL systems.
9-bit Latched TTL-to-ECL -- SY100H602 The SY10/100H602 are 9-bit, dual supply TTL-to-ECL translators with latches. Devices in the Micrel 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance.The...
Clock and Data Distribution -- SY100H603 The SY10/100H603 are 9-bit, dual supply ECL-to-TTL translators. Devices in the Micrel 9-bit translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical performance. The devices...
Clock and Data Distribution -- SY100H606 The SY10/100H606 are 6-bit, registered, single supply TTL-to-PECL translators. The devices feature differential PECL outputs as well as a choice between either a differential PECL clock input or a TTL...
Clock and Data Distribution -- SY100H641
Clock and Data Distribution -- SY100H641L
Clock and Data Distribution -- SY10H641
The SY10/100H641L are single supply, low skew translating 1:9 clock drivers. Devices in the Micrel H600 translator series utilize the 28-lead PLCC for optimal power pinning, signal flow-through and electrical...
Clock and Data Distribution -- SY100EL90 The SY100EL90V is a triple ECL/LVECL-to-PECL/LVPECL translator. The device can translate over all combinations of supply voltages: -5V ECL to 5V PECL, -5V ECL to 3.3V LVPECL, -3.3V LVECL to...
5V Triple ECL/LVECL-to-PECL/LVPECL Translator -- SY100EL91 The SY100EL91 is a triple PECL-to-ECL translator. It receives standard voltage PECL signals and translates them to different ECL output signals.A VBB output is provided for interfacing with single ended...
Clock and Data Distribution -- SY100EL91L The SY100EL91L is a triple LVPECL-to-ECL or LVPECL-to-LVECL translator. A VBB output is provided for interfacing with single ended PECL signals at the input. If a single ended input is...
Clock and Data Distribution -- SY100EL92 The SY100EL92 is a triple LVPECL-to-PECL or PECLto-LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals (or vice versa). SY100EL92 can also be...
Clock and Data Distribution -- SY100ELT23 The SY100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew,...
Clock and Data Distribution -- SY100ELT25 The SY100ELT25 is a differential ECL-to-TTL translator. Because ECL levels are used, a +5V, -5.2V (or -4.5V) and ground are required. The small outline 8- lead SOIC package and the...
Clock and Data Distribution -- SY100EP14AU
Clock and Data Distribution -- SY10E166J
The SY100EP14AU is a high-speed, 2GHz differential PECL/ECL 1:5 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 25ps over temperature and supply...
Clock and Data Distribution -- SY100EP14U The SY100EP14U is a high-speed, 2GHz differential PECL/ECL 1:5 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 25ps over temperature and supply...
Clock and Data Distribution -- SY100EP15V The SY100EP15V is a high-speed, low-skew, PECL/ECL 1:4 precision fanout buffer with a 2:1 mux front end in a small 16-pin TSSOP package. The 2:1 mux input accepts a single-ended...
Clock and Data Distribution -- SY100EP56 The SY100EP56V is a high-speed, low-skew, fully differential Dual PECL/ECL 2:1 multiplexer. This device is a pin-for-pin, plug-in replacement to the MC10/100EP56DT. Two separate 2:1 multiplexers (Channel 0 and Channel...
Clock and Data Distribution -- SY100EP57 The SY100EP57V is a high-speed, low-skew, fully differential PECL/ECL 4:1 multiplexer in a 20-pin TSSOP package. This device is a pin-for-pin, plug-in replacement to the MC10/100EP57DT. The signal-path inputs (D0:D3)...
Clock and Data Distribution -- SY100EPT21 The SY100EPT21L is a single, differential LVPECL-to-LVTTL translator using a single +3.3V power supply. Because low voltage positive ECL (LVPECL) levels are used, only +3.3V and ground are required. The...
Clock and Data Distribution -- SY100EPT22
Clock and Data Distribution -- SY10EPT22
The SY100EPT22V is a dual TTL/CMOS to differential PECL translator. Capable of running from a 3.3 or 5V supply, the part can be used in either LVTTL/LVCMOS/ LVPECL or TTL/CMOS/PECL...
Clock and Data Distribution -- SY100EPT23 The SY100EPT23L is a dual differential LVPECL-to-LVTTL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The tiny 8-pin MSOP and dual-gate design...
PECL-to-TTL Translator -- SY10H350 The SY10H350 consists of 4 translators with differential inputs and TTL outputs. The 3-state outputs can be disabled by applying a HIGH TTL logic level on the common OE input.
Clock and Data Distribution -- SY55851A The SY55851 and SY55851A are highly flexible, universal logic gates capable of up to 3.0GHz operation (SY55851A). These AnyGate® differential logic devices will produce all possible logic functions of two...
Clock and Data Distribution -- SY55855V The SY55855V is a fully differential, CML/PECL/LVPECL-to-LVDS translator. It achieves LVDS signaling up to 1.5Gbps, depending on the distance and the characteristics of the media and noise coupling sources. LVDS...
Clock and Data Distribution -- SY55857L The SY55857L is a fully differential, high-speed dual translator optimized to accept any logic standard from single-ended TTL/CMOS to differential LVDS, HSTL, or CML and translate it to LVPECL. Translation...
Clock and Data Distribution -- SY89222L The SY89222L is a dual TTL-to-differential LVPECL translator with a +3.3V power supply. Because LVPECL (Positive ECL) levels are used, only +3.3V and ground are required. The SY89222L is functionally...
Clock and Data Distribution -- SY89321L The SY89321L is a differential LVPECL/CML/LVDSto-LVTTL translator requiring only a single +3.3V power.The SY89321L is functionally equivalent to the SY100EPT21L, but in an ultra-small 8-pin MLF® package that features a...
Clock and Data Distribution -- SY89322V The SY89322V is a dual TTL/CMOS-to-differential PECL translator capable of running from a 3.3V or 5V supply. This part can be used in either LVTTL/LVCMOS/LVPECL or TTL/CMOS/PECL systems. It requires...
Clock and Data Distribution -- SY89323L The SY89323L is a dual differential LVPECL-to-LVTTL translator. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The SY89323L is functionally equivalent to the...
Clock and Data Distribution -- SY89325V The SY89325V is a fully differential, CML/PECL/LVPECLto-LVDS translator. It achieves LVDS signaling up to 1.5Gbps and clock rates of 750MHz, depending of the distance and the characteristics of the media...
Clock and Data Distribution -- SY89327L The SY89327L is a fully differential, high-speed translator optimized to accept any logic standard from single-ended TTL/CMOS to differential LVDS, HSTL, or CML and translate it to LVPECL. Translation is...
Clock and Data Distribution -- SY89328L The SY89328L is a differential LVPECL-to-LVTTL translator and an LVTTL-to-differential LVPECL translator in a single package. Because LVPECL (Positive ECL) levels are used, only +3.3V and ground are required. The...
Clock and Data Distribution -- SY89329V The SY89329V is a TTL/CMOS-to-differential PECL translator. Capable of running from a 3.3V or 5V supply, the part can be used in either LVTTL/LVCMOS/LVPECL or TTL/CMOS/PECL systems.The device requires only...
Clock and Data Distribution -- SY89826L The SY89826L is a precision fanout buffer with 22 differential LVDS (Low Voltage Differential Swing) output pairs. The part is designed for use in low voltage 3.3V applications that require...
Clock and Data Distribution -- SY89828L The SY89828L is a precision fanout buffer with 20 differential LVDS (Low Voltage Differential Swing) output pairs. The part is designed for use in low voltage 3.3V applications that require...
Clock and Data Distribution -- SY89829U The SY89829U is a High Performance dual 1:10 or single 1:20 LVPECL Clock Driver. The part is designed for use in low voltage (2.5V/3.3V) applications which require a large number...
Clock and Data Distribution -- SY89830U The SY89830U is a high-speed, 2.5GHz differential PECL 1:4 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than 25ps over temperature and supply...
Clock and Data Distribution -- SY89831U The SY89831U is a high-speed, 2GHz differential LVPECL 1:4 fanout buffer optimized for ultra-low skew applications. Within-device skew is guaranteed to be less than 20ps (5ps typ.) over supply voltage...
Clock and Data Distribution -- SY89832U The SY89832U is a 2.5V, high-speed, 2GHz differential LVDS (Low Voltage Differential Swing) 1:4 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than...
Clock and Data Distribution -- SY89833AL The SY89833AL is a lower noise version of the SY89833L 3.3V, high-speed 2GHz Low Voltage Differential Swing (LVDS) 1:4 fanout buffer. Within device skew is guaranteed to be less than...
Clock and Data Distribution -- SY89833L The SY89833L is a 3.3V, high-speed 2GHz differential Low Voltage Differential Swing (LVDS) 1:4 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than...
Clock and Data Distribution -- SY89834U The SY89834U is a high-speed, 1GHz LVTTL/CMOS-to-LVPECL fanout buffer/translator optimized for high-speed ultra-low skew applications. The input stage is designed to accept two single-ended LVTTL/CMOS compatible signals that feed into...
Clock and Data Distribution -- SY89835U The SY89835U is a 2.5V, high-speed 2GHz differential Low Voltage Differential Swing (LVDS) 1:2 fanout buffer optimized for ultra-low skew applications. Within device skew is guaranteed to be less than...