The SY89321L is a differential LVPECL/CML/LVDSto-LV
TTL translator requiring only a single +3.3V power.The SY89321L is functionally equivalent to the SY100EPT21L, but in an ultra-small 8-pin MLF® package that features a 70% smaller footprint. This ultra-small package and low skew single gate design make the SY89321L ideal for applications that require the translation of a clock or data signal where minimal space, low power and low cost are critical.VBB allows a differential, single-ended, or AC-coupled interface to the device. If used, the VBB output should be bypassed to VCC with 0.01µF capacitor.Under open input conditions, the /IN will be biased at a VCC/2 voltage level and the IN input will be pulled to ground. This condition will force the Q output low to provide added stability.The SY89321L is compatible with positive ECL 100k logic levels.
Additional Features
3.3V power supply
1.9ns typical propagation delay
275MHz fMAX
Differential LVPECL/CML/LVDS inputs
24mA LVTTL outputs
Flow-through pinouts
Internal input resistors: pulldown on IN, pulldown and pullup on /IN
Q output will default LOW with inputs open
VBB output
Available in ultra-small 8-pin MLF® (2mm x 2mm) package
The SY89321L is a differential LVPECL/CML/LVDSto-LVTTL translator requiring only a single +3.3V power.The SY89321L is functionally equivalent to the SY100EPT21L, but in an ultra-small 8-pin MLF® package that features a 70% smaller footprint. This ultra-small package and low skew single gate design make the SY89321L ideal for applications that require the translation of a clock or data signal where minimal space, low power and low cost are critical.VBB allows a differential, single-ended, or AC-coupled interface to the device. If used, the VBB output should be bypassed to VCC with 0.01µF capacitor.Under open input conditions, the /IN will be biased at a VCC/2 voltage level and the IN input will be pulled to ground. This condition will force the Q output low to provide added stability.The SY89321L is compatible with positive ECL 100k logic levels.
Additional Features
- 3.3V power supply
- 1.9ns typical propagation delay
- 275MHz fMAX
- Differential LVPECL/CML/LVDS inputs
- 24mA LVTTL outputs
- Flow-through pinouts
- Internal input resistors: pulldown on IN, pulldown and pullup on /IN
- Q output will default LOW with inputs open
- VBB output
- Available in ultra-small 8-pin MLF® (2mm x 2mm) package
