Texas Instruments Datasheets for Logic Gates

Logic gates are electronic circuits that combine digital signals according to boolean algebra.
Logic Gates: Learn more

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Product Name Notes
1 to 4 Configurable Low Frequency Clock Buffer for 3D Displays 12-WQFN -40 to 85
1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-LQFP -40 to 85
1-to-10 LVDS Clock Buffer up to 1100MHz with Minimum Skew for Clock Distribution 32-VQFN -40 to 85
1-to-10 LVDS clock buffer up to 900MHz with minimum skew for clock distribution 32-LQFP -40 to 85
1.8V 1-to-10 High Performance Differential Clock Buffer 48-VQFN -40 to 85
1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable 48-VQFN -40 to 85
1:10 LVPECL Buffer with Selectable Input 32-LQFP -40 to 85
1:10 LVPECL Buffer with Selectable Input 32-LQFP -55 to 125
1:10 LVPECL Buffer with Selectable Input 32-VQFN -40 to 85
25-Bit Configurable Registered Buffer w/Address-Parity Test 96-LFBGA -40 to 85
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70
28-Bit to 56-Bit Registered Buffer with Address-Parity Test 160-NFBGA -40 to 85
28-Bit to 56-Bit Registered Buffer with Address-Parity Test 176-NFBGA -40 to 85
3-GHz, 10-Output Differential Fanout Buffer / Level Translator 48-WQFN -40 to 85
3.1-GHz Differential Clock Buffer/Level Translator 32-WQFN -40 to 85
3.1-GHz Differential Clock Buffer/Level Translator 36-WQFN -40 to 85
3.1-GHz Differential Clock Buffer/Level Translator 40-WQFN -40 to 85
3V BLVDS 1 to 6 Clock Buffer/Bus Transceiver 24-TSSOP -40 to 85
4-Wide AND-OR-invert Gates 14-CDIP -55 to 125
4-Wide AND-OR-invert Gates 14-CFP -55 to 125
40 MHz Dual Clock Buffer 8-WSON -40 to 85
75 MHz Dual Clock Buffer 8-DSBGA
75 MHz Dual Clock Buffer 8-WSON -40 to 85
8-Input Positive-NAND Gates 14-CDIP -55 to 125
8-Input Positive-NAND Gates 14-CFP -55 to 125
8-Input Positive-NAND Gates 14-PDIP -40 to 85
8-Input Positive-NAND Gates 14-SOIC -40 to 85
AND-OR-invert Gates 14-CDIP -55 to 125
AND-OR-invert Gates 14-CFP -55 to 125
Automotive Catalog CMOS Quad 2-Input NAND Schmitt Triggers 14-SOIC -40 to 125
Automotive Catalog Quadruple 2-Input Positive-AND Gates 14-SOIC -40 to 125
CMOS 8-Input NAND/AND Gate 14-CDIP -55 to 125
CMOS 8-Input NAND/AND Gate 14-PDIP -55 to 125
CMOS 8-Input NAND/AND Gate 14-SO -55 to 125
CMOS 8-Input NAND/AND Gate 14-SOIC -55 to 125
CMOS 8-Input NAND/AND Gate 14-TSSOP -55 to 125
CMOS 8-Input NOR/OR Gate 14-CDIP -55 to 125
CMOS 8-Input NOR/OR Gate 14-PDIP -55 to 125
CMOS 8-Input NOR/OR Gate 14-SO -55 to 125
CMOS 8-Input NOR/OR Gate 14-SOIC -55 to 125
CMOS 8-Input NOR/OR Gate 14-TSSOP -55 to 125
CMOS 8-Input NOR/OR Gate 16-CDIP -55 to 125
CMOS Dual 2-Input NAND Buffer/Driver 14-CDIP -55 to 125
CMOS Dual 2-Input NAND Buffer/Driver 8-PDIP -55 to 125
CMOS Dual 2-Input NAND Buffer/Driver 8-SO -55 to 125
CMOS Dual 2-Input NAND Buffer/Driver 8-SOIC -55 to 125
CMOS Dual 2-Input NAND Buffer/Driver 8-TSSOP -55 to 125
CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125
CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-PDIP -55 to 125
CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-SOIC -55 to 125
CMOS Dual 2-Wide 2-Input AND-OR-INVERT Gate 14-TSSOP -55 to 125
CMOS Dual 4-Input AND Gate 14-CDIP -55 to 125
CMOS Dual 4-Input AND Gate 14-PDIP -55 to 125
CMOS Dual 4-Input AND Gate 14-SO -55 to 125
CMOS Dual 4-Input AND Gate 14-SOIC -55 to 125
CMOS Dual 4-Input AND Gate 14-TSSOP -55 to 125
CMOS Dual 4-Input NAND Gate 14-CDIP -55 to 125
CMOS Dual 4-Input NAND Gate 14-PDIP -55 to 125
CMOS Dual 4-Input NAND Gate 14-SO -55 to 125
CMOS Dual 4-Input NAND Gate 14-SOIC -55 to 125
CMOS Dual 4-Input NAND Gate 14-TSSOP -55 to 125
CMOS Dual 4-Input NOR Gate 14-CDIP -55 to 125
CMOS Dual 4-Input NOR Gate 14-PDIP -55 to 125
CMOS Dual 4-Input NOR Gate 14-SO -55 to 125
CMOS Dual 4-Input NOR Gate 14-SOIC -55 to 125
CMOS Dual 4-Input NOR Gate 14-TSSOP -55 to 125
CMOS Dual 4-Input OR Gate 14-CDIP -55 to 125
CMOS Dual 4-Input OR Gate 14-PDIP -55 to 125
CMOS Dual 4-Input OR Gate 14-SO -55 to 125
CMOS Dual 4-Input OR Gate 14-SOIC -55 to 125
CMOS Dual 4-Input OR Gate 14-TSSOP -55 to 125
CMOS Dual Complementary Pair Plus Inverter 14-CDIP -55 to 125
CMOS Dual Complementary Pair Plus Inverter 14-PDIP -55 to 125
CMOS Dual Complementary Pair Plus Inverter 14-SO -55 to 125
CMOS Dual Complementary Pair Plus Inverter 14-SOIC -55 to 125
CMOS Dual Complementary Pair Plus Inverter 14-TSSOP -55 to 125
CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate 14-CDIP -55 to 125
CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate 14-PDIP -55 to 125
CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate 14-SOIC -55 to 125
CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate) 16-PDIP -55 to 125
CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate) 16-SO -55 to 125
CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate) 16-SOIC -55 to 125
CMOS Hex Gate (with 4 Inverters, One 2-Input NOR Gate, and One 2-Input NAND Gate) 16-TSSOP -55 to 125
CMOS Multifunction Expandable 8-Input Gate 16-CDIP -55 to 125
CMOS Multifunction Expandable 8-Input Gate 16-PDIP -55 to 125
CMOS Multifunction Expandable 8-Input Gate 16-SOIC -55 to 125
CMOS Multifunction Expandable 8-Input Gate 16-TSSOP -55 to 125
CMOS Quad 2-Input AND Gate 0-WAFERSALE
CMOS Quad 2-Input AND Gate 14-CDIP -55 to 125
CMOS Quad 2-Input AND Gate 14-PDIP -55 to 125
CMOS Quad 2-Input AND Gate 14-SO -55 to 125
CMOS Quad 2-Input AND Gate 14-SOIC -55 to 125
CMOS Quad 2-Input AND Gate 14-TSSOP -55 to 125
CMOS Quad 2-Input NAND Gate 14-CDIP -55 to 125
CMOS Quad 2-Input NAND Gate 14-CDIP SB -55 to 125
CMOS Quad 2-Input NAND Gate 14-PDIP -55 to 125
CMOS Quad 2-Input NAND Gate 14-SO -55 to 125
CMOS Quad 2-Input NAND Gate 14-SOIC -55 to 125
CMOS Quad 2-Input NAND Gate 14-TSSOP -55 to 125
CMOS Quad 2-Input NAND Schmitt Triggers 0-WAFERSALE
CMOS Quad 2-Input NAND Schmitt Triggers 14-CDIP -55 to 125
CMOS Quad 2-Input NAND Schmitt Triggers 14-PDIP -55 to 125
CMOS Quad 2-Input NAND Schmitt Triggers 14-SO -55 to 125
CMOS Quad 2-Input NAND Schmitt Triggers 14-SOIC -55 to 125
CMOS Quad 2-Input NAND Schmitt Triggers 14-TSSOP -55 to 125
CMOS Quad 2-Input NOR Gate 14-CDIP -55 to 125
CMOS Quad 2-Input NOR Gate 14-PDIP -55 to 125
CMOS Quad 2-Input NOR Gate 14-SO -55 to 125
CMOS Quad 2-Input NOR Gate 14-SOIC -55 to 125
CMOS Quad 2-Input NOR Gate 14-TSSOP -55 to 125
CMOS Quad 2-Input OR Gate 14-CDIP -55 to 125
CMOS Quad 2-Input OR Gate 14-PDIP -55 to 125
CMOS Quad 2-Input OR Gate 14-SO -55 to 125
CMOS Quad 2-Input OR Gate 14-SOIC -55 to 125
CMOS Quad 2-Input OR Gate 14-TSSOP -55 to 125
CMOS Quad AND/OR Select Gate 16-CDIP -55 to 125
CMOS Quad AND/OR Select Gate 16-PDIP -55 to 125
CMOS Quad AND/OR Select Gate 16-SO -55 to 125
CMOS Quad AND/OR Select Gate 16-SOIC -55 to 125
CMOS Quad AND/OR Select Gate 16-TSSOP -55 to 125
CMOS Quad Exclusive-NOR Gate 14-CDIP -55 to 125
CMOS Quad Exclusive-NOR Gate 14-PDIP -55 to 125
CMOS Quad Exclusive-NOR Gate 14-SO -55 to 125
CMOS Quad Exclusive-NOR Gate 14-SOIC -55 to 125
CMOS Quad Exclusive-NOR Gate 14-TSSOP -55 to 125
CMOS Quad Exclusive-OR Gate 14-CDIP -55 to 125
CMOS Quad Exclusive-OR Gate 14-PDIP -55 to 125
CMOS Quad Exclusive-OR Gate 14-SO -55 to 125
CMOS Quad Exclusive-OR Gate 14-SOIC -55 to 125
CMOS Quad Exclusive-OR Gate 14-TSSOP -55 to 125
CMOS Triple 3-Input AND Gate 14-CDIP -55 to 125
CMOS Triple 3-Input AND Gate 14-PDIP -55 to 125
CMOS Triple 3-Input AND Gate 14-SO -55 to 125
CMOS Triple 3-Input AND Gate 14-SOIC -55 to 125
CMOS Triple 3-Input AND Gate 14-TSSOP -55 to 125
CMOS Triple 3-Input NAND Gate 14-CDIP -55 to 125
CMOS Triple 3-Input NAND Gate 14-PDIP -55 to 125
CMOS Triple 3-Input NAND Gate 14-SO -55 to 125
CMOS Triple 3-Input NAND Gate 14-SOIC -55 to 125
CMOS Triple 3-Input NAND Gate 14-TSSOP -55 to 125
CMOS Triple 3-Input NOR Gate 14-CDIP -55 to 125
CMOS Triple 3-Input NOR Gate 14-PDIP -55 to 125
CMOS Triple 3-Input NOR Gate 14-SO -55 to 125
CMOS Triple 3-Input NOR Gate 14-SOIC -55 to 125
CMOS Triple 3-Input NOR Gate 14-TSSOP -55 to 125
CMOS Triple 3-Input OR Gate 14-CDIP -55 to 125
CMOS Triple 3-Input OR Gate 14-PDIP -55 to 125
CMOS Triple 3-Input OR Gate 14-SO -55 to 125
CMOS Triple 3-Input OR Gate 14-SOIC -55 to 125
CMOS Triple 3-Input OR Gate 14-TSSOP -55 to 125
DDR4RCD01 JEDEC compliant DDR4 Register for RDIMM and LRDIMM operation up to DDR4-2400 253-NFBGA -40 to 95
Dual 1:5 High Speed LVPECL Fan Out Buffer 32-VQFN -40 to 85
Dual 2-Wide 2-Input AND-OR-invert Gates (One Gate Expandable) 14-CDIP -55 to 125
Dual 2-Wide 2-Input AND-OR-invert Gates (One Gate Expandable) 14-CFP -55 to 125
Dual 4-Input NAND Gates 14-CDIP -55 to 125
Dual 4-Input NAND Gates 14-PDIP -55 to 125
Dual 4-Input NAND Gates 14-SOIC -55 to 125
Dual 4-Input NOR Gates With Strobe 14-CDIP -55 to 125
Dual 4-Input NOR Gates With Strobe 14-CFP -55 to 125
Dual 4-Input NOR Gates With Strobe 16-CDIP -55 to 125
Dual Channel 52 MHz Clock Tree Driver 8-DSBGA -40 to 85
Dual-Channel Square/Sine-to-Square Wave Clock Buffer 8-DSBGA -40 to 85
Enhanced Product 2.5-V to 3.3-V High Performance Clock Buffer 24-TSSOP -55 to 125
Enhanced Product General Purpose and PCI-X 1:4 Clock Buffer 8-TSSOP -40 to 105
Enhanced Product Quad 2-Input Exclusive-Or Gate 14-SOIC -55 to 125
Enhanced Product Quadruple 2-Input Positive-And Gates 14-SOIC -40 to 125
General Purpose and PCI-X 1:4 Clock Buffer 8-TSSOP -40 to 85
High Performance 1:10 Clock Buffer for General Purpose Applications 24-TSSOP -40 to 85
High Speed CMOS Logic 14-CDIP -55 to 125
High Speed CMOS Logic 8-Input NAND Gate 14-CDIP -55 to 125
High Speed CMOS Logic 8-Input NAND Gate 14-PDIP -55 to 125
High Speed CMOS Logic 8-Input NAND Gate 14-SO -55 to 125
High Speed CMOS Logic 8-Input NAND Gate 14-SOIC -55 to 125
High Speed CMOS Logic 8-Input NAND Gate 14-TSSOP -55 to 125
High Speed CMOS Logic Dual 4-Input AND Gate 14-PDIP -55 to 125
High Speed CMOS Logic Dual 4-Input AND Gate 14-SOIC -55 to 125
High Speed CMOS Logic Dual 4-Input AND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Dual 4-Input AND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Dual 4-Input AND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Dual 4-Input NAND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Dual 4-Input NAND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Dual 4-Input NAND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Dual 4-Input NOR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Dual 4-Input NOR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Dual 4-Input NOR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Dual 4-Input NOR Gates 14-TSSOP -55 to 125
High Speed CMOS Logic Quad 2-Input AND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input AND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input AND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input AND Gates 14-TSSOP -55 to 125
High Speed CMOS Logic Quad 2-Input EXCLUSIVE OR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input Exclusive-NOR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input Exclusive-OR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input Exclusive-OR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Gates with Open Drain 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input NAND Schmitt Trigger 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NOR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NOR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input NOR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input OR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input OR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad 2-Input Schmitt-Triggered NAND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad 2-Input Schmitt-Triggered NAND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad Schmitt-Triggered 2-Input NAND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad Schmitt-Triggered 2-Input NAND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad Two-Input NOR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad Two-Input NOR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad Two-Input NOR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Quad Two-Input OR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Quad Two-Input OR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Quad Two-Input OR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Triple 3-Input AND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Triple 3-Input AND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Triple 3-Input AND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Triple 3-Input NAND Gates 14-CDIP -55 to 125
High Speed CMOS Logic Triple 3-Input NAND Gates 14-PDIP -55 to 125
High Speed CMOS Logic Triple 3-Input NAND Gates 14-SOIC -55 to 125
High Speed CMOS Logic Triple 3-Input NOR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Triple 3-Input NOR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Triple 3-Input NOR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 14-CDIP -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 14-PDIP -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 14-SO -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 14-SOIC -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 14-TSSOP -55 to 125
High Speed CMOS Logic Triple 3-Input OR Gates 20-LCCC -55 to 125
High-Speed CMOS Logic Dual 4-Input NAND Gates 14-PDIP -55 to 125
High-Speed CMOS Logic Dual 4-Input NAND Gates 14-SOIC -55 to 125
LMK00334 4-Output PCIe Gen1/Gen2/Gen3 Clock Buffer/Level Translator 32-WQFN -40 to 85
LMK00338 8-Output PCIe Gen1/2/3 Clock Buffer/Level Translator 40-WQFN -40 to 85
Low Jitter 1:2 Universal-to-LVPECL Buffer 16-QFN -40 to 85
Low Jitter, 1:10 LVCMOS Fan-out Clock Buffer 20-TSSOP -40 to 85
Low Jitter, 1:12 LVCMOS Fan-out Clock Buffer 24-TSSOP -40 to 85
Low Jitter, 1:2 LVCMOS Fan-out Clock Buffer 8-TSSOP -40 to 85
Low Jitter, 1:3 LVCMOS Fan-out Clock Buffer 8-TSSOP -40 to 85
Low Jitter, 1:4 LVCMOS Fan-out Clock Buffer 8-TSSOP -40 to 85
Low Jitter, 1:6 LVCMOS Fan-out Clock Buffer 14-TSSOP -40 to 85
Low Jitter, 1:8 LVCMOS Fan-out Clock Buffer 16-TSSOP -40 to 85
Low Jitter, 2-Input Selectable 1:12 Universal-to-LVDS Buffer 40-VQFN -40 to 85
Low Jitter, 2-Input Selectable 1:12 Universal-to-LVPECL Buffer 40-VQFN
Low Jitter, 2-Input Selectable 1:16 Universal-to-LVDS Buffer 48-VQFN -40 to 85
Low Jitter, 2-Input Selectable 1:16 Universal-to-LVPECL Buffer 48-VQFN -40 to 85
Low Jitter, 2-Input Selectable 1:4 Universal-to-LVDS Buffer 16-QFN -40 to 85
Low Jitter, 2-Input Selectable 1:4 Universal-to-LVPECL Buffer 16-QFN
Low Jitter, 2-Input Selectable 1:8 Universal-to-LVDS Buffer 28-VQFN -40 to 85
Low Jitter, 2-Input Selectable 1:8 Universal-to-LVPECL Buffer 28-VQFN
Low Jitter, Dual 1:2 Universal-to-LVDS Buffer 16-QFN -40 to 85
Low Jitter, Dual 1:2 Universal-to-LVPECL Buffer 16-QFN
Low Jitter, Dual 1:4 Universal-to-LVDS Buffer 28-VQFN -40 to 85
Low Jitter, Dual 1:4 Universal-to-LVPECL Buffer 28-VQFN
Low Jitter, Dual 1:6 Universal-to-LVDS Buffer 40-VQFN -40 to 85
Low Jitter, Dual 1:6 Universal-to-LVPECL Buffer 40-VQFN
Low Jitter, Dual 1:8 Universal-to-LVDS Buffer 48-VQFN -40 to 85
Low Jitter, Dual 1:8 Universal-to-LVPECL Buffer 48-VQFN
Low Skew, 1-to-4 Multiplexed Differential/LVCMOS-to-LVCMOS/TTL Fanout Buffer 16-TSSOP -40 to 85
Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer 20-TSSOP -40 to 85
Mono Audio Subsys w/ class G Headphone Amp Class D Speaker Amp Noise Gate & Speaker Protection 25-DSBGA -40 to 85
Quad 2-Input AND Gates 14-CDIP -55 to 125
Quad 2-Input AND Gates 14-PDIP -55 to 125
Quad 2-Input AND Gates 14-SOIC -55 to 125
Quad 2-Input Exclusive-OR Gates 14-CDIP -55 to 125
Quad 2-Input Exclusive-OR Gates 14-PDIP -55 to 125
Quad 2-Input Exclusive-OR Gates 14-SOIC -55 to 125
Quad 2-Input NAND Gates 14-CDIP -55 to 125
Quad 2-Input NAND Gates 14-PDIP -55 to 125
Quad 2-Input NAND Gates 14-SOIC -55 to 125
Quad 2-Input NOR Gates 14-CDIP -55 to 125
Quad 2-Input NOR Gates 14-PDIP -55 to 125
Quad 2-Input NOR Gates 14-SOIC -55 to 125
Quad 2-Input OR Gates 14-CDIP -55 to 125
Quad 2-Input OR Gates 14-PDIP -55 to 125
Quad 2-Input OR Gates 14-SOIC -55 to 125
Quad Channel 27 MHz Clock Tree Driver with I2C Interface 16-DSBGA -20 to 85
Quad Sine-Wave Clock Buffer with LDO 20-DSBGA -40 to 85
Quadruple 2-Input Exclusive-OR Gates 16-PDIP -40 to 85
Quadruple 2-Input Exclusive-OR Gates 16-SOIC -40 to 85
Quadruple 2-Input Positive-AND Gates 14-CDIP -55 to 125
Quadruple 2-Input Positive-AND Gates 14-CFP -55 to 125
Quadruple 2-Input Positive-AND Gates 16-PDIP -40 to 85
Quadruple 2-Input Positive-AND Gates 16-SOIC -40 to 85
Quadruple 2-Input Positive-AND Gates 16-TSSOP -40 to 85
Quadruple 2-Input Positive-AND Gates 20-LCCC -55 to 125
Quadruple 2-Input Positive-NAND Buffers With Open-Collector Outp 14-CDIP -55 to 125
Quadruple 2-Input Positive-NAND Buffers With Open-Collector Outp 14-CFP -55 to 125
Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
Quadruple 2-Input Positive-NAND Gates 14-CFP -55 to 125
Quadruple 2-Input Positive-NAND Gates 16-PDIP -40 to 85
Quadruple 2-Input Positive-NAND Gates 16-SOIC -40 to 85
Quadruple 2-Input Positive-NAND Gates 20-LCCC -55 to 125
Quadruple 2-Input Positive-NAND Gates With Open-Collector Output 14-CDIP -55 to 125
Quadruple 2-Input Positive-NAND Gates With Open-Collector Output 14-CFP -55 to 125
Quadruple 2-Input Positive-NOR Buffers 14-CDIP -55 to 125
Quadruple 2-Input Positive-NOR Buffers 14-CFP -55 to 125
Quadruple 2-Input Positive-NOR Gates 0-
Quadruple 2-Input Positive-NOR Gates 14-CDIP -55 to 125
Quadruple 2-Input Positive-NOR Gates 14-CFP -55 to 125
Quadruple 2-Input Positive-OR Gates 14-CDIP -55 to 125
Quadruple 2-Input Positive-OR Gates 14-CFP -55 to 125
Quadruple 2-Input Positive-OR Gates 16-PDIP -40 to 85
Quadruple 2-Input Positive-OR Gates 16-SO -40 to 85
Quadruple 2-Input Positive-OR Gates 16-SOIC -40 to 85
Quadruple 2-Input Positive-OR Gates 16-SSOP -40 to 85
RadTolerant Class V, Quadruple 2-Input Positive-NAND Gate 0-
Triple 3-Input NAND Gates 14-PDIP -55 to 125
Triple 3-Input NAND Gates 14-SOIC -55 to 125
Ultra Low Power, 2:8 Fan-out Buffer with Universal Inputs and Outputs 32-VQFN -40 to 85
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input 24-WQFN -40 to 85
Ultra-low Jitter LVCMOS Fanout Buffer/Level Translator with Universal Input 32-WQFN -40 to 85
Universal input, 10 output low impedance LVCMOS Buffer 32-VQFN -40 to 85

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