Texas Instruments Datasheets for Parity Checkers and Generators
Parity checkers are integrated circuits (ICs) used in digital systems to detect errors when streams of bits are sent from a transmitter to a receiver. Parity generators calculate the parity of data packets and add a parity amount to them.
Parity Checkers and Generators: Learn more
| Product Name | Notes |
|---|---|
| 3.3-V 12-Bit Universal Bus Driver with Parity Checker and Dual 3-State Outputs 56-SSOP -40 to 85 | |
| 9-Bit Odd/Even Parity Generator/Checker 14-CDIP -55 to 125 | |
| 9-Bit Odd/Even Parity Generator/Checker 14-PDIP -55 to 125 | |
| 9-Bit Odd/Even Parity Generator/Checker 14-SOIC -55 to 125 | |
| 9-bit odd/even parity generators / checkers 14-PDIP 0 to 70 | |
| 9-bit odd/even parity generators / checkers 14-SO 0 to 70 | |
| 9-bit odd/even parity generators / checkers 14-SOIC 0 to 70 | |
| 9-Bit Odd/Even Parity Generators/Checkers 14-CDIP -55 to 125 | |
| 9-Bit Odd/Even Parity Generators/Checkers 14-CFP -55 to 125 | |
| 9-Bit Odd/Even Parity Generators/Checkers 20-LCCC -55 to 125 | |
| 9-Bit Parity Generators/Checkers 14-PDIP 0 to 70 | |
| 9-Bit Parity Generators/Checkers 14-SO 0 to 70 | |
| 9-Bit Parity Generators/Checkers 14-SOIC 0 to 70 | |
| 9-Bit Parity Generators/Checkers With Bus Driver Parity I/O Ports 14-SOIC -40 to 85 | |
| 9-Bit Parity Generators/Checkers With Bus-Driver Parity I/O Ports 14-PDIP 0 to 70 | |
| 9-Bit Parity Generators/Checkers With Bus-Driver Parity I/O Ports 14-SOIC 0 to 70 | |
| Dual 8-Bit Parity Generator/Checker 28-LCCC -55 to 125 | |
| High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-CDIP -55 to 125 | |
| High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-PDIP -55 to 125 | |
| High Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker 14-SOIC -55 to 125 |