Richardson RFPD Datasheets for RF Attenuators
RF attenuators are circuits that reduce the power level of a signal by a certain amount (gain), with little or no reflection. They reduce the output signal with respect to the input and measure the power reduction in decibels (dB).
RF Attenuators: Learn more
| Product Name | Notes |
|---|---|
| Richardson RFPD, an Arrow Company, is a specialized electronic component distributor providing design engineers with deep technical expertise and localized global design support for the latest new products from the... | |
| SMA Male to Female Attenuator, 18 GHz | |
| SMA Miniature Attenuator - Fixed Coaxial. 2 Watts. DC - 18 GHz. | |
| SMA Plug to Jack Attenuator DC to 18 GHz | |
| SPDT Ramses 1.85mm 67GHz Failsafe 12Vdc Pins Terminals | |
| SPDT Ramses 1.85mm 67GHz Failsafe 12Vdc TTL Diodes Pins Terminals | |
| The Si5315A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5315B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5316 jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5317A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5317B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5317C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5317D jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5319A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5319B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5319C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 1 input(s),... | |
| The Si5322 jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5323 jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5324 is a low-bandwidth, jitter-attenuating, precision clock multiplier for applications requiring sub 1 ps jitter performance with loop bandwidths between 4 Hz and 525 Hz. The Si5324 accepts two... | |
| The Si5324A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5324B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5324C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5324D jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5325A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5325B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5325C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5326A jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5326B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5326C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5327B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5327C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5327D jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5328B jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5328C jitter attenuator combines third-generation DSPLL technology to enable any-frequency clock generation and jitter attenuation for applications requiring a high level of jitter performance. This device supports 2 input(s),... | |
| The Si5342A 2 -output, high-performance jitter attenuator combines fourth-generation DSPLL and MultiSynth technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. | |
| The Si5342B 2 -output, high-performance jitter attenuator combines fourth-generation DSPLL and MultiSynth technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. | |
| The Si5342C 2 -output, high-performance jitter attenuator combines fourth-generation DSPLL and MultiSynth technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. | |
| The Si5342D 2 -output, high-performance jitter attenuator combines fourth-generation DSPLL and MultiSynth technologies to enable any-frequency clock generation and jitter attenuation for applications requiring the highest level of jitter performance. |
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