Silicon Labs Datasheets for IC Phase-locked Loops (PLL)
IC phase-locked loops (PLL) are closed-loop frequency controls that are based on the phase difference between the input signal and the output signal of a controlled oscillator.
IC Phase-locked Loops (PLL): Learn more
|Silicon Labs' embedded Intel x86 clock generators support a wide variety of chipsets and processors. They provide all the necessary clock generation for the CPU, memory controller (chipset north bridge),...|
|Silicon Labs' PCI Express clocks provide industry-leading jitter performance, compliance with PCI Express (PCIe) Gen 1/2/3 requirements, outstanding frequency flexibility and configurable AC parameters for signal integrity optimization. The PCIe...|
|Silicon Labs' zero delay clock buffer products are used in applications that require zero propagation delay between the input and output clocks. Silicon Labs' zero delay buffers are based on...|
|The Si413x is a monolithic integrated circuit that performs IF and dual-band, low-noise RF frequency synthesis for wireless personal communications applications. Features Dual RF and single IF frequency synthesizer RF1...|
|The Si5374/75 any-frequency jitter attenuating clocks integrate four independent jitter attenuating PLLs into a single device, providing industry-leading integration for space-constrained OTN (OTU1, OTU2, OTU3, OTU4) applications. The Si537x can...|