Nexperia B.V. 3-to-8 line decoder/demultiplexer; inverting 74AHCT138BQ,115

Description
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexe r. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138; 74AHCT138 devices and one inverter. The 74AHC138; 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger action Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Inputs accepts voltages higher than VCC For 74AHC138 only: operates with CMOS input levels For 74AHCT138 only: operates with TTL input levels ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • 3-to-8 line decoder/demultiplexer; inverting - 74AHCT138BQ,115 - Nexperia B.V.
    Nexperia B.V.
Request a Quote Datasheet
Description
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexe r. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138; 74AHCT138 devices and one inverter. The 74AHC138; 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger action Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Inputs accepts voltages higher than VCC For 74AHC138 only: operates with CMOS input levels For 74AHCT138 only: operates with TTL input levels ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
3-to-8 line decoder/demultiplexer; inverting - 74AHCT138BQ,115 - Nexperia B.V.
Nexperia B.V.
Nijmegen, Netherlands
3-to-8 line decoder/demultiplexer; inverting
74AHCT138BQ,115
3-to-8 line decoder/demultiplexer; inverting 74AHCT138BQ,115
The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexe r. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138; 74AHCT138 devices and one inverter. The 74AHC138; 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. Features and benefits Balanced propagation delays All inputs have Schmitt-trigger action Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Inputs accepts voltages higher than VCC For 74AHC138 only: operates with CMOS input levels For 74AHCT138 only: operates with TTL input levels ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74AHC138; 74AHCT138 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.

The 74AHC138; 74AHCT138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0 to Y7) that are LOW when selected.

There are three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.

This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74AHC138; 74AHCT138 devices and one inverter. The 74AHC138; 74AHCT138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.

Features and benefits

  • Balanced propagation delays
  • All inputs have Schmitt-trigger action
  • Demultiplexing capability
  • Multiple input enable for easy expansion
  • Ideal for memory chip select decoding
  • Inputs accepts voltages higher than VCC
  • For 74AHC138 only: operates with CMOS input levels
  • For 74AHCT138 only: operates with TTL input levels
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Win Source Electronics
Laguna Hills, CA, United States
Integrated Circuits (ICs) - Logic - Signal Switches, Multiplexers, Decoders
989523-74AHCT138BQ,115
Integrated Circuits (ICs) - Logic - Signal Switches, Multiplexers, Decoders 989523-74AHCT138BQ,115
Win Source Part Number: 989523-74AHCT138BQ,1 15 Category: Integrated Circuits (ICs)>Logic - Signal Switches, Multiplexers, Decoders Series: 74AHCT Type: Decoder/Demultiplexe r Package: Tape & Reel (TR) Standard Package: 3,000 Mounting: SMD (SMT) Current - Output High, Low: 8mA, 8mA Independent Circuits: 1 Voltage Supply Source: Single Supply Voltage - Supply: 4.5V ~ 5.5V Package / Case: 16-VFQFN Exposed Pad Supplier Device Package: 16-DHVQFN (2.5x3.5) Temperature Range - Operating: -40°C ~ 125°C ECCN: EAR99 Fake Threat In the Open Market: 46 pct. MSL Level: 1 (Unlimited) REACH Status: REACH Unaffected HTSUS: 8542.39.0001 Mfr: Nexperia USA Inc. Other Names: 935285573115,74AHCT1 38BQ-G-ND,74AHCT138B Q-G Base Product Number: 74AHCT138

Win Source Part Number: 989523-74AHCT138BQ,115
Category: Integrated Circuits (ICs)>Logic - Signal Switches, Multiplexers, Decoders
Series: 74AHCT
Type: Decoder/Demultiplexer
Package: Tape & Reel (TR)
Standard Package: 3,000
Mounting: SMD (SMT)
Current - Output High, Low: 8mA, 8mA
Independent Circuits: 1
Voltage Supply Source: Single Supply
Voltage - Supply: 4.5V ~ 5.5V
Package / Case: 16-VFQFN Exposed Pad
Supplier Device Package: 16-DHVQFN (2.5x3.5)
Temperature Range - Operating: -40°C ~ 125°C
ECCN: EAR99
Fake Threat In the Open Market: 46 pct.
MSL Level: 1 (Unlimited)
REACH Status: REACH Unaffected
HTSUS: 8542.39.0001
Mfr: Nexperia USA Inc.
Other Names: 935285573115,74AHCT138BQ-G-ND,74AHCT138BQ-G
Base Product Number: 74AHCT138

Buy Now Datasheet

Technical Specifications

  Nexperia B.V. Win Source Electronics
Product Category Logic Decoders and Demultiplexers Logic Decoders and Demultiplexers
Product Number 74AHCT138BQ,115 989523-74AHCT138BQ,115
Product Name 3-to-8 line decoder/demultiplexer; inverting Integrated Circuits (ICs) - Logic - Signal Switches, Multiplexers, Decoders
Function Decoder/Demultiplexer
Input Lines 3
Output Lines 8
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V
Features ESD Protection
Unlock Full Specs
to access all available technical data

Similar Products

Quad single-pole single-throw analog switch - HEF4066BT-Q100J - Nexperia B.V.
Nexperia B.V.
Quad single-pole single-throw analog switch
HEF4066BT-Q100J
Specs
Features ESD Protection
Package Type SOT108-1
View Details
- 74HC138D/C5J - Rochester Electronics
Nexperia B.V.
74HC138D/C5J
Specs
Function Decoder
Package Type SOT109-1
View Details
3-to-8 line decoder, demultiplexer with address latches - 74HC237D,653 - Nexperia B.V.
Nexperia B.V.
3-to-8 line decoder, demultiplexer with address latches
74HC237D,653
Specs
Input Lines 3
Output Lines 8
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0
View Details
4 suppliers
3-to-8 line decoder/demultiplexer - 74HCT238D,653 - Nexperia B.V.
Nexperia B.V.
3-to-8 line decoder/demultiplexer
74HCT238D,653
Specs
Function Decoder/Demultiplexer
Input Lines 3
Output Lines 8
View Details
2 suppliers