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Nexperia B.V. Dual D-type flip-flop with set and reset; positive edge-trigger 74ABT74PW,118

Description
The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Supply voltage range from 4.5 V to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up protection exceeds 500 mA per JESD78B class II level A ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C
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Suppliers

Company
Product
Description
Supplier Links
Dual D-type flip-flop with set and reset; positive edge-trigger - 74ABT74PW,118 - Nexperia B.V.
Nijmegen, Netherlands
Dual D-type flip-flop with set and reset; positive edge-trigger
74ABT74PW,118
Dual D-type flip-flop with set and reset; positive edge-trigger 74ABT74PW,118
The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. Features and benefits Supply voltage range from 4.5 V to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up protection exceeds 500 mA per JESD78B class II level A ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C

The 74ABT74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Features and benefits

  • Supply voltage range from 4.5 V to 5.5 V
  • BiCMOS high speed and output drive
  • Direct interface with TTL levels
  • Power-up 3-state
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up protection exceeds 500 mA per JESD78B class II level A
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C
Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74ABT74PW,118 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74ABT74PW,118
Integrated Circuits (ICs) - Logic - Flip Flops 74ABT74PW,118
IC FF D-TYPE DUAL 1BIT 14TSSOP

IC FF D-TYPE DUAL 1BIT 14TSSOP

Supplier's Site
Flip Flops - 1727-74ABT74PW,118TR-ND - DigiKey
Thief River Falls, MN, United States
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Flip Flops - 74ABT74PW,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74ABT74PW,118
Flip Flops 74ABT74PW,118
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Supplier's Site Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74ABT74PW,118
764862-74ABT74PW,118
Logic - Logic - Flip Flops - 74ABT74PW,118 764862-74ABT74PW,118
Manufacturer: Nexperia USA Inc. Win Source Part Number: 764862-74ABT74PW,118 Series: 74ABT Packaging: Reel package Type: D-Type Operating Temperature Range: -40°C ~ 85°C (TA) Package: 14-TSSOP (0.173", 4.40mm Width) Mounting: SMD Output Type: Differential Current - Output High, Low: 15mA, 20mA Operating Supply Voltage: 4.5 V ~ 5.5 V Function: Set(Preset) and Reset Number of Elements: 2 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 4.2ns @ 5V, 50pF Current - Quiescent: 50μA Input Capacitance: 3pF Family Name: 74ABT74 Categories: Integrated Circuits (ICs) Clock Frequency: 250MHz Alternative Parts (Cross-Reference): 74ABT74N,112; 74ABT74N; 74ABT74DB,112; Introduction Date: September 22, 1995 ECCN: EAR99 Country of Origin: Thailand Estimated EOL Date: 2026 Halogen Free: Compliant Popularity: Medium Fake Threat In the Open Market: 28 pct. Supply and Demand Status: Limited

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 764862-74ABT74PW,118
Series: 74ABT
Packaging: Reel package
Type: D-Type
Operating Temperature Range: -40°C ~ 85°C (TA)
Package: 14-TSSOP (0.173", 4.40mm Width)
Mounting: SMD
Output Type: Differential
Current - Output High, Low: 15mA, 20mA
Operating Supply Voltage: 4.5 V ~ 5.5 V
Function: Set(Preset) and Reset
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 4.2ns @ 5V, 50pF
Current - Quiescent: 50μA
Input Capacitance: 3pF
Family Name: 74ABT74
Categories: Integrated Circuits (ICs)
Clock Frequency: 250MHz
Alternative Parts (Cross-Reference): 74ABT74N,112; 74ABT74N; 74ABT74DB,112;
Introduction Date: September 22, 1995
ECCN: EAR99
Country of Origin: Thailand
Estimated EOL Date: 2026
Halogen Free: Compliant
Popularity: Medium
Fake Threat In the Open Market: 28 pct.
Supply and Demand Status: Limited

Supplier's Site Datasheet
Logic - Flip Flops - 74ABT74PW,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74ABT74PW,118
Logic - Flip Flops 74ABT74PW,118
IC FF D-TYPE DUAL 1BIT 14TSSOP

IC FF D-TYPE DUAL 1BIT 14TSSOP

Supplier's Site Datasheet
 - 74ABT74PW,118 - Rochester Electronics
Newburyport, MA, United States
74ABT74 - Dual D-type flip-flop

74ABT74 - Dual D-type flip-flop

Supplier's Site Datasheet
Logic - Flip Flops - 74ABT74PW,118 - Nova Technology(HK) Co.,Ltd
Futian District, Shenzhen, China
Logic - Flip Flops
74ABT74PW,118
Logic - Flip Flops 74ABT74PW,118
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Shenzhen Shengyu Electronics Technology Limited DigiKey Quarktwin Technology Ltd. Win Source Electronics Lingto Electronic Limited Rochester Electronics Nova Technology(HK) Co.,Ltd
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74ABT74PW,118 74ABT74PW,118 1727-74ABT74PW,118TR-ND 74ABT74PW,118 764862-74ABT74PW,118 74ABT74PW,118 74ABT74PW,118 74ABT74PW,118
Product Name Dual D-type flip-flop with set and reset; positive edge-trigger Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Flip Flops Logic - Logic - Flip Flops - 74ABT74PW,118 Logic - Flip Flops Logic - Flip Flops
Flip-Flop Type D D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered
Supply Voltage 5V; 4.5 - 5.5 4.5V ~ 5.5V 4.5V ~ 5.5V 4.5 V ~ 5.5 V
Features ESD Protection
Propagation Delay 3 ns 4.2 ns 4.2 ns
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