The TP2502 is a P-channel enhancement-mode vertical DMOS FET designed for low-threshold switching applications such as logic-level interfaces, solid-state relays, and battery-operated systems. It is packaged in a 3-lead SOT-89 and has a maximum drain-to-source breakdown voltage of -20V, a gate threshold voltage range of -1V to -2.4V, and a maximum on-state resistance of 2Ω at -10V gate-source voltage and -1A drain current. The device features a maximum input capacitance of 125pF, fast switching speeds with a turn-on delay of 10ns and a fall time of 12ns, and operates over a junction temperature range of -55°C to +150°C. It has a thermal resistance of 133°C/W and is compliant with RoHS standards.
This low threshold enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Additional Features
| Microchip Technology, Inc. | |
|---|---|
| Product Category | Metal-Oxide Semiconductor FET (MOSFET) |
| Product Number | TP2502 |
| Product Name | -20V P-Channel Enhancement-Mode MOSFET |
| Polarity | P-Channel |
