The KSZ9893 is a fully integrated layer 2, managed, three-port gigabit Ethernet switch with numerous advanced features. Two of the three ports incorporate 10/100/1000 Mbps PHYs. The other port has interfaces that can be configured as RGMII, MII or RMII. This port may connect directly to a host processor or to an external PHY.
Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.
Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.
An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments.
Looking for a Linux® Host Processor? Try the SAMA5D3 Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
Additional Features
Highlights
Non-blocking wire-speed Ethernet switching fabric
Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
Full VLAN and QoS support
Two ports with integrated 10/100/1000BASE-T PHYs
One port with 10/100/1000 Ethernet MAC and configurable RGMII/MII/RMII interface
IEEE 802.1X port-based authentication support
EtherGreenTM power management features, including low power standby and IEEE 802.3az
Flexible management interface options: SPI, I2C, MIIM, and in-band management via any port
Commercial/Industria
l temperature range support
64-pin VQFN (8 x 8mm) lead-free package
Switch Management Capabilities
10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters
Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 128kByte frame buffer
Jumbo packet support up to 9000 bytes
Port mirroring/monitoring
/sniffing: ingress and/or egress traffic to any port
MIB counters for fully-compliant statistics gathering 34 counters per port
Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority
Loopback modes for remote failure diagnostics
Multiple spanning tree protocol (MSTP) support
Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery
Advanced Switch Capabilities
IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs
IEEE 802.1p/Q tag insertion/removal on per port basis
VLAN ID on per port or VLAN basis
IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control
IEEE 802.1X (Port-Based Network Access Control)
IGMP v1/v2/v3 snooping for multicast packet filtering
IPv6 multicast listener discovery (MLD) snooping
IPv4/IPv6 QoS support, QoS/CoS packet prioritization
802.1p QoS packet classification with 4 priority queues
Programmable rate limiting at ingress/egress ports
Broadcast storm protection
Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class
MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
Self-address filtering for implementing ring topologies
Comprehensive Configuration Registers Access
High-speed 4-wire SPI (up to 50MHz), I2C interfaces provide access to all internal registers
MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers
I/O pin strapping facility to set certain register bits from I/O pins at reset time
In-band management via any of the three ports
On-the-fly configurable control registers
Power Management
IEEE 802.3az Energy Efficient Ethernet (EEE)
Energy detect power-down mode on cable disconnect
Dynamic clock tree control
Unused ports can be individually powered down
Full-chip software power-down
Wake-on-LAN (WoL) standby power mode
The KSZ9893 is a fully integrated layer 2, managed, three-port gigabit Ethernet switch with numerous advanced features. Two of the three ports incorporate 10/100/1000 Mbps PHYs. The other port has interfaces that can be configured as RGMII, MII or RMII. This port may connect directly to a host processor or to an external PHY.
Full register access is available by SPI or I2C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface.
Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering.
An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments.
Looking for a Linux® Host Processor? Try the SAMA5D3
Microchip's complimentary and confidential LANCheck® online design review service is available for customers who have selected our products for their application design-in. The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.
Additional Features
- Highlights
- Non-blocking wire-speed Ethernet switching fabric
- Full-featured forwarding and filtering control, including Access Control List (ACL) filtering
- Full VLAN and QoS support
- Two ports with integrated 10/100/1000BASE-T PHYs
- One port with 10/100/1000 Ethernet MAC and configurable RGMII/MII/RMII interface
- IEEE 802.1X port-based authentication support
- EtherGreenTM power management features, including low power standby and IEEE 802.3az
- Flexible management interface options: SPI, I2C, MIIM, and in-band management via any port
- Commercial/Industrial temperature range support
- 64-pin VQFN (8 x 8mm) lead-free package
- Switch Management Capabilities
- 10/100/1000Mbps Ethernet switch basic functions: frame buffer management, address look-up table, queue management, MIB counters
- Non-blocking store-and-forward switch fabric assures fast packet delivery by utilizing 4096 entry forwarding table with 128kByte frame buffer
- Jumbo packet support up to 9000 bytes
- Port mirroring/monitoring/sniffing: ingress and/or egress traffic to any port
- MIB counters for fully-compliant statistics gathering 34 counters per port
- Tail tagging mode (one byte added before FCS) support at host port to inform the processor which ingress port receives the packet and its priority
- Loopback modes for remote failure diagnostics
- Multiple spanning tree protocol (MSTP) support
- Rapid spanning tree protocol (RSTP) support for topology management and ring/linear recovery
- Advanced Switch Capabilities
- IEEE 802.1Q VLAN support for 128 active VLAN groups and the full range of 4096 VLAN IDs
- IEEE 802.1p/Q tag insertion/removal on per port basis
- VLAN ID on per port or VLAN basis
- IEEE 802.3x full-duplex flow control and half-duplex back pressure collision control
- IEEE 802.1X (Port-Based Network Access Control)
- IGMP v1/v2/v3 snooping for multicast packet filtering
- IPv6 multicast listener discovery (MLD) snooping
- IPv4/IPv6 QoS support, QoS/CoS packet prioritization
- 802.1p QoS packet classification with 4 priority queues
- Programmable rate limiting at ingress/egress ports
- Broadcast storm protection
- Four priority queues with dynamic packet mapping for IEEE 802.1p, IPv4 DIFFSERV, IPv6 Traffic Class
- MAC filtering function to filter or forward unknown unicast, multicast and VLAN packets
- Self-address filtering for implementing ring topologies
- Comprehensive Configuration Registers Access
- High-speed 4-wire SPI (up to 50MHz), I2C interfaces provide access to all internal registers
- MII Management (MIIM, MDC/MDIO 2-wire) Interface provides access to all PHY registers
- I/O pin strapping facility to set certain register bits from I/O pins at reset time
- In-band management via any of the three ports
- On-the-fly configurable control registers
- Power Management
- IEEE 802.3az Energy Efficient Ethernet (EEE)
- Energy detect power-down mode on cable disconnect
- Dynamic clock tree control
- Unused ports can be individually powered down
- Full-chip software power-down
- Wake-on-LAN (WoL) standby power mode