Integrated Device Technology 8:1 Differential-to-LVDS Clock Multiplexer 854S058AGILFT

Description
The 854S058I is an 8:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0 , nPCLK0).
Datasheet
Description
The 854S058I is an 8:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0 , nPCLK0).
Datasheet

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8:1 Differential-to-LVDS Clock Multiplexer - 854S058AGILFT - Integrated Device Technology
San Jose, CA, USA
8:1 Differential-to-LVDS Clock Multiplexer
854S058AGILFT
8:1 Differential-to-LVDS Clock Multiplexer 854S058AGILFT
The 854S058I is an 8:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0 , nPCLK0).

The 854S058I is an 8:1 Differential-to- LVDS Clock Multiplexer which can operate up to 2.5GHz. The 854S058I has 8 selectable differential clock inputs. The PCLK , nPCLK input pairs can accept LVPECL , LVDS or SSTL levels. The fully differential architecture and low propagation delay make it ideal for use in clock distribution circuits. The select pins have internal pulldown resistors. The SEL2 pin is the most significant bit and the binary number applied to the select pins will select the same numbered data input (i.e., 000 selects PCLK0 , nPCLK0).

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Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 854S058AGILFT
Product Name 8:1 Differential-to-LVDS Clock Multiplexer
Technology LVDS
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