Integrated Device Technology Low Skew,1-to-4 LVCMOS-to-LVHSTL Fanout Buffer 8525BGLFT

Description
The 8525 is a low skew, high performance 1-to-4 LVCMOS -to- LVHSTL fanout buffer. The 8525 has two selectable clock inputs thataccept LVCMOS or LVTTL input levels and translate them to LVHSTL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8525 ideal for those applications demanding well defined performance and repeatability.
Datasheet
Description
The 8525 is a low skew, high performance 1-to-4 LVCMOS -to- LVHSTL fanout buffer. The 8525 has two selectable clock inputs thataccept LVCMOS or LVTTL input levels and translate them to LVHSTL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8525 ideal for those applications demanding well defined performance and repeatability.
Datasheet

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Low Skew,1-to-4 LVCMOS-to-LVHSTL Fanout Buffer - 8525BGLFT - Integrated Device Technology
San Jose, CA, USA
Low Skew,1-to-4 LVCMOS-to-LVHSTL Fanout Buffer
8525BGLFT
Low Skew,1-to-4 LVCMOS-to-LVHSTL Fanout Buffer 8525BGLFT
The 8525 is a low skew, high performance 1-to-4 LVCMOS -to- LVHSTL fanout buffer. The 8525 has two selectable clock inputs thataccept LVCMOS or LVTTL input levels and translate them to LVHSTL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8525 ideal for those applications demanding well defined performance and repeatability.

The 8525 is a low skew, high performance 1-to-4 LVCMOS -to- LVHSTL fanout buffer. The 8525 has two selectable clock inputs thataccept LVCMOS or LVTTL input levels and translate them to LVHSTL levels. The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8525 ideal for those applications demanding well defined performance and repeatability.

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Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 8525BGLFT
Product Name Low Skew,1-to-4 LVCMOS-to-LVHSTL Fanout Buffer
Technology CMOS
Device Type Buffer
Supply Voltage 3.3V
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