Integrated Device Technology Synchronous Ethernet Two-Channel PLL for 10GbE and 40GbE 82V3911AUG8

Description
IDT 82V3911 is a single chip, two channel synchronous Ethernet (SyncE) PLL . The device supports ITU -T G.8262, G.813 and Telcordia GR -253- CORE compliance with hitless reference switching, frequency translation and jitter attenuation. Its ultra-low jitter generation makes it suitable for timing 10GBASE -R, 10GBASE -W, OC -192/ STM -64 or 40GBASE -R PHYs. The high-integration architecture minimizes component count and board space by including two independent digital PLLs (DPLLs); one for the transmit PHY function and one to provide recovered line timing to the system’s synchronous equipment timing source ( SETS ). Two independent jitter attenuating analog PLLs (APLLs) are also integrated; these APLLs generate clocks with jitter below 0.3 ps RMS over the 10 kHz to 20 MHz integration range and can be used to directly time 10GbE or 40GbE network PHYs or other high speed interfaces. The DPLLs lock to a wide variety of telecom and Ethernet reference frequencies and suppress reference switching transients to generate highly-reliable output clocks for optimal network performance. IDT 82V3911 offers a network PHY timing solution optimized for use in Ethernet switches, routers, multiservice switching platforms, wireless backhaul equipment and other communications infrastructure. IDT 82V3911 is available in a 196-ball 15 x 15 mm CABGA package and supports standard industrial temperature range from -40degC to +85degC.
Datasheet
Description
IDT 82V3911 is a single chip, two channel synchronous Ethernet (SyncE) PLL . The device supports ITU -T G.8262, G.813 and Telcordia GR -253- CORE compliance with hitless reference switching, frequency translation and jitter attenuation. Its ultra-low jitter generation makes it suitable for timing 10GBASE -R, 10GBASE -W, OC -192/ STM -64 or 40GBASE -R PHYs. The high-integration architecture minimizes component count and board space by including two independent digital PLLs (DPLLs); one for the transmit PHY function and one to provide recovered line timing to the system’s synchronous equipment timing source ( SETS ). Two independent jitter attenuating analog PLLs (APLLs) are also integrated; these APLLs generate clocks with jitter below 0.3 ps RMS over the 10 kHz to 20 MHz integration range and can be used to directly time 10GbE or 40GbE network PHYs or other high speed interfaces. The DPLLs lock to a wide variety of telecom and Ethernet reference frequencies and suppress reference switching transients to generate highly-reliable output clocks for optimal network performance. IDT 82V3911 offers a network PHY timing solution optimized for use in Ethernet switches, routers, multiservice switching platforms, wireless backhaul equipment and other communications infrastructure. IDT 82V3911 is available in a 196-ball 15 x 15 mm CABGA package and supports standard industrial temperature range from -40degC to +85degC.
Datasheet

Suppliers

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Supplier Links
Synchronous Ethernet Two-Channel PLL for 10GbE and 40GbE - 82V3911AUG8 - Integrated Device Technology
San Jose, CA, USA
Synchronous Ethernet Two-Channel PLL for 10GbE and 40GbE
82V3911AUG8
Synchronous Ethernet Two-Channel PLL for 10GbE and 40GbE 82V3911AUG8
IDT 82V3911 is a single chip, two channel synchronous Ethernet (SyncE) PLL . The device supports ITU -T G.8262, G.813 and Telcordia GR -253- CORE compliance with hitless reference switching, frequency translation and jitter attenuation. Its ultra-low jitter generation makes it suitable for timing 10GBASE -R, 10GBASE -W, OC -192/ STM -64 or 40GBASE -R PHYs. The high-integration architecture minimizes component count and board space by including two independent digital PLLs (DPLLs); one for the transmit PHY function and one to provide recovered line timing to the system’s synchronous equipment timing source ( SETS ). Two independent jitter attenuating analog PLLs (APLLs) are also integrated; these APLLs generate clocks with jitter below 0.3 ps RMS over the 10 kHz to 20 MHz integration range and can be used to directly time 10GbE or 40GbE network PHYs or other high speed interfaces. The DPLLs lock to a wide variety of telecom and Ethernet reference frequencies and suppress reference switching transients to generate highly-reliable output clocks for optimal network performance. IDT 82V3911 offers a network PHY timing solution optimized for use in Ethernet switches, routers, multiservice switching platforms, wireless backhaul equipment and other communications infrastructure. IDT 82V3911 is available in a 196-ball 15 x 15 mm CABGA package and supports standard industrial temperature range from -40degC to +85degC.

IDT 82V3911 is a single chip, two channel synchronous Ethernet (SyncE) PLL . The device supports ITU -T G.8262, G.813 and Telcordia GR -253- CORE compliance with hitless reference switching, frequency translation and jitter attenuation. Its ultra-low jitter generation makes it suitable for timing 10GBASE -R, 10GBASE -W, OC -192/ STM -64 or 40GBASE -R PHYs. The high-integration architecture minimizes component count and board space by including two independent digital PLLs (DPLLs); one for the transmit PHY function and one to provide recovered line timing to the system’s synchronous equipment timing source ( SETS ). Two independent jitter attenuating analog PLLs (APLLs) are also integrated; these APLLs generate clocks with jitter below 0.3 ps RMS over the 10 kHz to 20 MHz integration range and can be used to directly time 10GbE or 40GbE network PHYs or other high speed interfaces. The DPLLs lock to a wide variety of telecom and Ethernet reference frequencies and suppress reference switching transients to generate highly-reliable output clocks for optimal network performance. IDT 82V3911 offers a network PHY timing solution optimized for use in Ethernet switches, routers, multiservice switching platforms, wireless backhaul equipment and other communications infrastructure. IDT 82V3911 is available in a 196-ball 15 x 15 mm CABGA package and supports standard industrial temperature range from -40degC to +85degC.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Phase-locked Loops (PLL)
Product Number 82V3911AUG8
Product Name Synchronous Ethernet Two-Channel PLL for 10GbE and 40GbE
Bus Interface LVPECL; LVDS; LVPECL,LVDS,LVCMOS
Package Type Surface Mount; CABGA
Supply Voltage 3.3 volts
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