OptiMOS™ low-voltage power MOSFET 30 V in PQFN 3.3x3.3 Source-Down package with industry leading RDS(on) and superior thermal performance.
The IQE008N03LM5CG is Infineon’s extension of the innovative Source-Down technology. The OptiMOSTM 5 30V PQFN 3.3x3.3 Source-Down features 30 V and low RDS(on) of 0.85 mOhm. The revolutionary Source-Down technology introduces a flipped silicon die, which is positioned upside down inside of the components. This adjustment allows the source potential (instead of the drain potential) to be connected to the PCB over the thermal pad. Therefore, it offers several advantages, such as increased thermal capability, advanced power density or improved layout possibilities. Furthermore, the higher efficiency, the reduced active cooling requirements and the effective layout for thermal management are benefits at the system level. Thanks to the new benchmark RDS(on) and the innovative layout capacities enable the Source-Down concept to have a leading position in temperature management. The Source-Down portfolio is addressing applications, such as Drives, Telecom, SMPS or Server. The new technology can be found in two different footprints for now: Source-Down Standard-Gate and Source-Down Center-Gate (optimized for parallelization).
Summary of Features
Major reduction in RDS(on) by up to 30% compared to current technology
Improved RthJC over current PQFN package technology
Standard and Center Gate footprints available
New, optimized layout possibilities
Benefits
Enabling highest power density and performance
Superior thermal performance
Optimized layout possibilities for efficient use of real-estate
Simplifying parallel configuration of multiple MOSFETs with center gate footprint
Improved PCB losses
Reduced parasitics
Potential Applications
Drives
SMPS
Server
Telecom
OR-ing
Battery management
OptiMOS™ low-voltage power MOSFET 30 V in PQFN 3.3x3.3 Source-Down package with industry leading RDS(on) and superior thermal performance.
The IQE008N03LM5CG is Infineon’s extension of the innovative Source-Down technology. The OptiMOSTM 5 30V PQFN 3.3x3.3 Source-Down features 30 V and low RDS(on) of 0.85 mOhm. The revolutionary Source-Down technology introduces a flipped silicon die, which is positioned upside down inside of the components. This adjustment allows the source potential (instead of the drain potential) to be connected to the PCB over the thermal pad. Therefore, it offers several advantages, such as increased thermal capability, advanced power density or improved layout possibilities. Furthermore, the higher efficiency, the reduced active cooling requirements and the effective layout for thermal management are benefits at the system level. Thanks to the new benchmark RDS(on) and the innovative layout capacities enable the Source-Down concept to have a leading position in temperature management. The Source-Down portfolio is addressing applications, such as Drives, Telecom, SMPS or Server. The new technology can be found in two different footprints for now: Source-Down Standard-Gate and Source-Down Center-Gate (optimized for parallelization).
Summary of Features
- Major reduction in RDS(on) by up to 30% compared to current technology
- Improved RthJC over current PQFN package technology
- Standard and Center Gate footprints available
- New, optimized layout possibilities
Benefits
- Enabling highest power density and performance
- Superior thermal performance
- Optimized layout possibilities for efficient use of real-estate
- Simplifying parallel configuration of multiple MOSFETs with center gate footprint
- Improved PCB losses
- Reduced parasitics
Potential Applications
- Drives
- SMPS
- Battery management
