Texas Instruments TPS51200 3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 TPS51200DRCTG4

Related Documents

• Reference Designs
  Altera Arria V GX FPGA Power Solution Reference Design Altera Arria V GZ FPGA Discrete Power Solution Reference Design Altera Arria V SoC FPGA Power Solution Reference Design Altera Arria V SoC Power Supply Reference Design Altera Cyclone V SoC FPGA Power Reference Design Altera Cyclone V SoC Power Supply Reference Design Altera? Stratix? V FPGA Power Solution Analog Solution for Kintex 7 Analog Solution for Virtex 7 Analog Solution for Zynq Arria V Power Reference Design Enterprise Tablet Reference Design Kit Power for Altera Cyclone V (Cyclone 5) FPGA Power for Altera Cyclone V (Cyclone 5) FPGA (.75V@.75A) Reference Design Power for Altera Cyclone V (Cyclone 5) FPGA (1.1V@6A) Reference Design Power for Altera Cyclone V (Cyclone 5) FPGA (1.5V@3A) Reference Design Power for Altera Cyclone V (Cyclone 5) FPGA (2.5V@3.5A) Power for Altera Cyclone V (Cyclone 5) FPGA (3.3V@2.5A) Reference Design Power Reference Design for Xilinx? Zynq-7000 Reference Design for Telecom Applications (.9V @ .5A) Reference Design for Telecom Applications (1.05V @ 7A) Reference Design for Telecom Applications (1.2V @ 2A) Reference Design for Telecom Applications (1.8V @ 4A) Reference Design for Telecom Applications (12V @ 1.1A) Reference Design for Telecom Applications (24V @ 0.5A) Reference Design for Telecom Applications (3.3V @ 5A) Single Chip Drive for Industrial Communications and Motor Control Smart Home and Energy Gateway Reference Design Spartan-6 LX150T Dev Kit Xilinx Artix 7 FPGA Power Management Reference Design