Texas Instruments CD74HCT112 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset CD74HCT112EE4

Description
High Speed CMOS Logic Dual Negative-Edge-Trigge red J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
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Description
High Speed CMOS Logic Dual Negative-Edge-Trigge red J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125
Request a Quote Datasheet

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CD74HCT112 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset - CD74HCT112EE4 - Texas Instruments
Dallas, TX, United States
CD74HCT112 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
CD74HCT112EE4
CD74HCT112 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset CD74HCT112EE4
High Speed CMOS Logic Dual Negative-Edge-Trigge red J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125

High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 16-PDIP -55 to 125

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Technical Specifications

  Texas Instruments
Product Category Flip-Flops
Product Number CD74HCT112EE4
Product Name CD74HCT112 High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset
Flip-Flop Type J-K
Triggering Negative-edge Triggered
Supply Voltage 5V; 5
Propagation Delay 44 ns
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