Texas Instruments CD74ACT112 Dual Negative-Edge Triggered J-K Flip-Flops with Set and Reset CD74ACT112M

The CD74ACT112M is a dual negative-edge triggered J-K flip-flop designed by Texas Instruments. It features independent J-K flip-flops that can be set or reset via preset (PRE) and clear (CLR) inputs, regardless of other input levels. The device operates with TTL-compatible inputs and offers a propagation delay that is balanced, ensuring reliable performance in digital circuits. This flip-flop supports a supply voltage range of 4.5V to 5.5V and can drive output currents of up to ¬±24 mA, allowing for a fanout of up to 15 F devices. It is built using a SCR-latchup-resistant CMOS process, providing enhanced reliability and exceeding 2-kV ESD protection per MIL-STD-883 standards. The operating temperature range is from -55¬8C to 125¬8C, making it suitable for a variety of applications, including those in harsh environments. The CD74ACT112M is capable of functioning as a toggle flip-flop when both J and K inputs are tied high. It has specific timing requirements, including a maximum clock frequency of 100 MHz and setup and hold times that ensure proper data transfer on the negative clock edge. This product is ideal for engineers looking for a robust and versatile flip-flop solution for their digital design needs.