Nexperia B.V. 3-to-8 line decoder/demultiplexer with Schmitt-trigger inputs and inverting outputs 74HCS138PWJ

Description
The 74HCS138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ICs and one inverter. The 74HCS138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Schmitt-trigger inputs Low power consumption Typical supply current (ICC) of 100 nA Typical input leakage current (II) of ±10 nA ±7.8 mA output drive at 6 V Demultiplexing capability Multiple input enable for easy expansion or independent controls Ideal for memory chip select decoding Active LOW mutually exclusive outputs Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD7A (2.0 V to 6.0 V)
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Description
The 74HCS138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ICs and one inverter. The 74HCS138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Schmitt-trigger inputs Low power consumption Typical supply current (ICC) of 100 nA Typical input leakage current (II) of ±10 nA ±7.8 mA output drive at 6 V Demultiplexing capability Multiple input enable for easy expansion or independent controls Ideal for memory chip select decoding Active LOW mutually exclusive outputs Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD7A (2.0 V to 6.0 V)
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3-to-8 line decoder/demultiplexer with Schmitt-trigger inputs and inverting outputs - 74HCS138PWJ - Nexperia B.V.
Nijmegen, Netherlands
3-to-8 line decoder/demultiplexer with Schmitt-trigger inputs and inverting outputs
74HCS138PWJ
3-to-8 line decoder/demultiplexer with Schmitt-trigger inputs and inverting outputs 74HCS138PWJ
The 74HCS138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ICs and one inverter. The 74HCS138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V Schmitt-trigger inputs Low power consumption Typical supply current (ICC) of 100 nA Typical input leakage current (II) of ±10 nA ±7.8 mA output drive at 6 V Demultiplexing capability Multiple input enable for easy expansion or independent controls Ideal for memory chip select decoding Active LOW mutually exclusive outputs Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD7A (2.0 V to 6.0 V)

The 74HCS138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four ICs and one inverter. The 74HCS138 can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V
  • Schmitt-trigger inputs
  • Low power consumption
    • Typical supply current (ICC) of 100 nA
    • Typical input leakage current (II) of ±10 nA
  • ±7.8 mA output drive at 6 V
  • Demultiplexing capability
  • Multiple input enable for easy expansion or independent controls
  • Ideal for memory chip select decoding
  • Active LOW mutually exclusive outputs
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD7A (2.0 V to 6.0 V)
Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V.
Product Category Logic Decoders and Demultiplexers
Product Number 74HCS138PWJ
Product Name 3-to-8 line decoder/demultiplexer with Schmitt-trigger inputs and inverting outputs
Function Decoder/Demultiplexer
Input Lines 3
Output Lines 8
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