Microchip Technology, Inc. MOSFET TP0620N3-G P005

The TP0620N3-G is a P-channel enhancement-mode vertical DMOS FET in a TO-92 package, designed for low-threshold switching applications such as TTL and CMOS logic interfaces, solid-state relays, and battery-operated systems. It has a drain-to-source breakdown voltage of -200 V, a maximum gate-to-source voltage of ±20 V, and a threshold voltage of -2.4 V maximum. The device exhibits low on-resistance (12 Ω max at -10 V gate drive), low input capacitance (85 pF typ), and operates over a temperature range of -55°C to +150°C. It is RoHS compliant and rated for continuous drain current of -175 mA. The package dimensions follow the JEDEC TO-92 standard with a height of 0.610 inches maximum.