Microchip Technology, Inc. Super I/O Controller LPC47M192

Description
LPC47M192 is a 3.3V (5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring Capabilities. The Hardware monitoring capability includes voltage and temperature monitoring, 7 analog input for external voltage input, and 2 external thermal diode pins. Product incorporates complete legacy super I/O functionality including an 8042 based keyboard and mouse controller. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP. Sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support is incorporated and supports multiple low power-down modes. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals. SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels. Family parts LPC47M192-NW Additional Features Features: LPC Interface 8042 Keyboard Control 128 QFP Packaging 37 GPIO pins 2 Fan Tachometer Inputs Legacy I/O CMOS 765B Floppy Disk Controller Two 16C550A Compatible UARTs 1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP ACPI 1.0b/2.0 Compatible ISA Plug-and-Play Standard Support
Datasheet
Description
LPC47M192 is a 3.3V (5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring Capabilities. The Hardware monitoring capability includes voltage and temperature monitoring, 7 analog input for external voltage input, and 2 external thermal diode pins. Product incorporates complete legacy super I/O functionality including an 8042 based keyboard and mouse controller. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP. Sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support is incorporated and supports multiple low power-down modes. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals. SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels. Family parts LPC47M192-NW Additional Features Features: LPC Interface 8042 Keyboard Control 128 QFP Packaging 37 GPIO pins 2 Fan Tachometer Inputs Legacy I/O CMOS 765B Floppy Disk Controller Two 16C550A Compatible UARTs 1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP ACPI 1.0b/2.0 Compatible ISA Plug-and-Play Standard Support
Datasheet

Suppliers

Company
Product
Description
Supplier Links
Super I/O Controller - LPC47M192 - Microchip Technology, Inc.
Chandler, AZ, United States
Super I/O Controller
LPC47M192
Super I/O Controller LPC47M192
LPC47M192 is a 3.3V (5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring Capabilities. The Hardware monitoring capability includes voltage and temperature monitoring, 7 analog input for external voltage input, and 2 external thermal diode pins. Product incorporates complete legacy super I/O functionality including an 8042 based keyboard and mouse controller. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP. Sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support is incorporated and supports multiple low power-down modes. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals. SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels. Family parts LPC47M192-NW Additional Features Features: LPC Interface 8042 Keyboard Control 128 QFP Packaging 37 GPIO pins 2 Fan Tachometer Inputs Legacy I/O CMOS 765B Floppy Disk Controller Two 16C550A Compatible UARTs 1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP ACPI 1.0b/2.0 Compatible ISA Plug-and-Play Standard Support

LPC47M192 is a 3.3V (5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface and Hardware Monitoring Capabilities. The Hardware monitoring capability includes voltage and temperature monitoring, 7 analog input for external voltage input, and 2 external thermal diode pins. Product incorporates complete legacy super I/O functionality including an 8042 based keyboard and mouse controller. The true CMOS 765B core provides 100% compatibility with IBM PC/XTTM and PC/ATTM architectures. The parallel port is compatible with IEEE 1284 EPP and ECP.
Sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake up events as well as PME support is incorporated and supports multiple low power-down modes. There are also three LEDs to indicate power status and hard drive activity. The translation circuit converts 3.3V signals to 5V signals.
SMBus main power well to resume power well isolation circuitry, included. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M192 may be reprogrammed through the internal configuration registers. There are up to 480 (960 for Parallel Port) I/O address location options, a Serialized IRQ interface, and three DMA channels.

Family parts
LPC47M192-NW

Additional Features

      Features:
      • LPC Interface
      • 8042 Keyboard Control
      • 128 QFP Packaging
      • 37 GPIO pins
      • 2 Fan Tachometer Inputs
      • Legacy I/O
      • CMOS 765B Floppy Disk Controller
      • Two 16C550A Compatible UARTs
      • 1 Multi-Mode Parallel Port with ChiProtectTM, EPP and ECP
      • ACPI 1.0b/2.0 Compatible
      • ISA Plug-and-Play Standard Support
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category I/O Modules and Instruments
Product Number LPC47M192
Product Name Super I/O Controller
Form Factor ['MQFP']
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