The LP0701 is a P-channel enhancement-mode lateral MOSFET designed for battery-operated and logic-level applications, available in 3-lead TO-92 and 8-lead SOIC packages. It features a maximum drain-to-source voltage of -16.5 V, a gate threshold voltage range of -0.5 V to -1 V, and a static drain-to-source on-resistance of 1.3 Ω to 2 Ω depending on operating conditions. The device operates with an ambient temperature range of -55°C to +150°C and has thermal resistance of 132 °C/W in TO-92 and 101 °C/W in SOIC when mounted on an FR4 board. It meets RoHS compliance with a Pb-free matte tin finish and is free from thermal runaway and secondary breakdown.
These enhancement-mode (normally-off) transistors utilize a lateral MOS structure and well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and negative temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally induced secondary breakdown. The low threshold voltage and low on-resistance characteristics are ideally suited for hand held, battery operated applications.
Additional Features
| Microchip Technology, Inc. | |
|---|---|
| Product Category | Metal-Oxide Semiconductor FET (MOSFET) |
| Product Number | LP0701 |
| Product Name | P-Channel Enhancement-Mode LATERAL MOSFET |
| Polarity | P-Channel |
