Microchip Technology, Inc. 10/100 Base-T/TX Ethernet Controller with 8/16 Bit/SPI/SQI Interface lan9250

Description
The LAN9250 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance,flexibil ity, ease of integration and system cost control are required. The LAN9250 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9250 complies with the IEEE802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE)(100Mbps only), and the IEEE 1588v2 precision time protocol. 100BASE-FX is supported via an external fiber transceiver. The LAN9250 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. For additional design flexibility SPI and SQI interfaces are also supported. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The LAN9250 also supports features which reduce or eliminate packet loss. The internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions. The LAN9250 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator.The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for lower system power dissipation Microchip's complimentary and confidential LANCheck® online design review services are available for customers who have selected our products for their application design-in*. *The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account. Additional Features 16-bit 10/100 industrial Ethernet controller & PHY Interfaces to most 8/16-bit embedded controllers Also 32-bit embedded controllers with an 8/16-bit bus Also supports SPI/SQI Integrated Ethernet PHY with HP Auto-MDIX Integrated Ethernet MAC Compliant with Energy Efficient Ethernet 802.3az Wake on LAN (WoL) support Integrated IEEE 1588v2 hardware time stamp unit Cable diagnostic support 1.8V to 3.3V variable voltage I/O Integrated 1.2V regulator for single 3.3V operation Low pin count and small body size package
Datasheet
Description
The LAN9250 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance,flexibil ity, ease of integration and system cost control are required. The LAN9250 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9250 complies with the IEEE802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE)(100Mbps only), and the IEEE 1588v2 precision time protocol. 100BASE-FX is supported via an external fiber transceiver. The LAN9250 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. For additional design flexibility SPI and SQI interfaces are also supported. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The LAN9250 also supports features which reduce or eliminate packet loss. The internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions. The LAN9250 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator.The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for lower system power dissipation Microchip's complimentary and confidential LANCheck® online design review services are available for customers who have selected our products for their application design-in*. *The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account. Additional Features 16-bit 10/100 industrial Ethernet controller & PHY Interfaces to most 8/16-bit embedded controllers Also 32-bit embedded controllers with an 8/16-bit bus Also supports SPI/SQI Integrated Ethernet PHY with HP Auto-MDIX Integrated Ethernet MAC Compliant with Energy Efficient Ethernet 802.3az Wake on LAN (WoL) support Integrated IEEE 1588v2 hardware time stamp unit Cable diagnostic support 1.8V to 3.3V variable voltage I/O Integrated 1.2V regulator for single 3.3V operation Low pin count and small body size package
Datasheet

Suppliers

Company
Product
Description
Supplier Links
10/100 Base-T/TX Ethernet Controller with 8/16 Bit/SPI/SQI Interface - lan9250 - Microchip Technology, Inc.
Chandler, AZ, United States
10/100 Base-T/TX Ethernet Controller with 8/16 Bit/SPI/SQI Interface
lan9250
10/100 Base-T/TX Ethernet Controller with 8/16 Bit/SPI/SQI Interface lan9250
The LAN9250 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance,flexibil ity, ease of integration and system cost control are required. The LAN9250 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9250 complies with the IEEE802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE)(100Mbps only), and the IEEE 1588v2 precision time protocol. 100BASE-FX is supported via an external fiber transceiver. The LAN9250 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. For additional design flexibility SPI and SQI interfaces are also supported. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The LAN9250 also supports features which reduce or eliminate packet loss. The internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions. The LAN9250 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator.The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for lower system power dissipation Microchip's complimentary and confidential LANCheck® online design review services are available for customers who have selected our products for their application design-in*. *The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account. Additional Features 16-bit 10/100 industrial Ethernet controller & PHY Interfaces to most 8/16-bit embedded controllers Also 32-bit embedded controllers with an 8/16-bit bus Also supports SPI/SQI Integrated Ethernet PHY with HP Auto-MDIX Integrated Ethernet MAC Compliant with Energy Efficient Ethernet 802.3az Wake on LAN (WoL) support Integrated IEEE 1588v2 hardware time stamp unit Cable diagnostic support 1.8V to 3.3V variable voltage I/O Integrated 1.2V regulator for single 3.3V operation Low pin count and small body size package

The LAN9250 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance,flexibility, ease of integration and system cost control are required. The LAN9250 has been specifically designed to provide high performance and throughput for 16-bit applications. The LAN9250 complies with the IEEE802.3 (full/half-duplex 10BASE-T and 100BASE-TX) Ethernet protocol, IEEE 802.3az Energy Efficient Ethernet (EEE)(100Mbps only), and the IEEE 1588v2 precision time protocol. 100BASE-FX is supported via an external fiber transceiver.
The LAN9250 includes an integrated Ethernet MAC and PHY with a high-performance SRAM-like slave interface. For additional design flexibility SPI and SQI interfaces are also supported. The integrated checksum offload engines enable the automatic generation of the 16-bit checksum for received and transmitted Ethernet frames, offloading the task from the CPU. The LAN9250 also includes large transmit and receive data FIFOs to accommodate high latency applications. In addition, the LAN9250 memory buffer architecture allows highly efficient use of memory resources by optimizing packet granularity. The LAN9250 also supports features which reduce or eliminate packet loss. The internal 16-KByte SRAM can hold over 200 received packets. If the receive FIFO gets too full, the LAN9250 can automatically generate flow control packets to the remote node, or assert back-pressure on the remote node by generating network collisions.
The LAN9250 can be configured to operate via a single 3.3V supply utilizing an integrated 3.3V to 1.2V linear regulator.The linear regulator may be optionally disabled, allowing usage of a high efficiency external regulator for lower system power dissipation
Microchip's complimentary and confidential LANCheck® online design review services are available for customers who have selected our products for their application design-in*.
*The LANCheck online design review service is subject to Microchip's Program Terms and Conditions and requires a myMicrochip account.

Additional Features

    • 16-bit 10/100 industrial Ethernet controller & PHY
    • Interfaces to most 8/16-bit embedded controllers
    • Also 32-bit embedded controllers with an 8/16-bit bus
    • Also supports SPI/SQI
    • Integrated Ethernet PHY with HP Auto-MDIX
    • Integrated Ethernet MAC
    • Compliant with Energy Efficient Ethernet 802.3az
    • Wake on LAN (WoL) support
    • Integrated IEEE 1588v2 hardware time stamp unit
    • Cable diagnostic support
    • 1.8V to 3.3V variable voltage I/O
    • Integrated 1.2V regulator for single 3.3V operation
    • Low pin count and small body size package
Supplier's Site Datasheet

Technical Specifications

  Microchip Technology, Inc.
Product Category Network Cards and Network Controllers
Product Number lan9250
Product Name 10/100 Base-T/TX Ethernet Controller with 8/16 Bit/SPI/SQI Interface
Host Bus 8/16-bit Host Bus or SPI
Unlock Full Specs
to access all available technical data

Similar Products

Communication Board - BOXIO - Sichuan Odot Automation System Co., Ltd.
Sichuan Odot Automation System Co., Ltd.
Specs
Protocol / Network CC-Link Ver.2
Data Rate 156 to 10000 kbps
Operating Temperature -35 to 70 C (-31 to 158 F)
View Details
4G/LTE Wireless WAN Module. Ideal for mobile connectivity solutions and remote site WAN connectivity. -  - Advantech
Specs
Processor Type 4G/LTE Wireless WAN Module. Ideal for mobile connectivity solutions and remote site WAN connectivity.
View Details
Network Cards - 2857494 - RS Components, Ltd.
RS Components, Ltd.
Specs
Data Rate 1.00E7 kbps
Host Bus PCI; PCIe
Number of Ports 5
View Details