Integrated Device Technology 3.3V Zero Delay, Low Skew Buffer MK2308G-1HILF

Description
The MK2308 -1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.
Description
The MK2308 -1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.

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3.3V Zero Delay, Low Skew Buffer - MK2308G-1HILF - Integrated Device Technology
San Jose, CA, USA
3.3V Zero Delay, Low Skew Buffer
MK2308G-1HILF
3.3V Zero Delay, Low Skew Buffer MK2308G-1HILF
The MK2308 -1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.

The MK2308 -1H is a low phase noise, high-speed PLL based, 8-output, low skew zero delay buffer. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. For normal operation as a zero delay buffer, any output clock is tied to the FBIN pin. IDT manufactures a large variety of clock generators and buffers.

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Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number MK2308G-1HILF
Product Name 3.3V Zero Delay, Low Skew Buffer
Device Type Buffer
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