The 8737I-11 is a low skew, high performance Differential-to-3.3V LVPECL ClockGenerator/Divid
er. The 8737I-11 has two selectable clock inputs. The CLK , nCLK pair can acceptmost standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels.The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio
n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8737I-11 ideal for clock distribution applications demanding well defined performance and repeatability.
The 8737I-11 is a low skew, high performance Differential-to-3.3V LVPECL ClockGenerator/Divider. The 8737I-11 has two selectable clock inputs. The CLK , nCLK pair can acceptmost standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels.The clock enable is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 8737I-11 ideal for clock distribution applications demanding well defined performance and repeatability.
