Integrated Device Technology Low Skew, 1-to-5, Differential-to-3.3V LVPECL/ECL Fanout Buffer 8735BYI-01LFT

The 8735BI -01 is a highly versatile 1:5 Differential- to-3.3V LVPECL clock generator. The 8735BI -01 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 31.25MHz to 700MHz. The reference divider, feedback divider and output divider are each programmable, thereby allowing for the following output-to-input frequency ratios: 8:1, 4:1, 2:1, 1:1, 1:2, 1:4, 1:8. The external feedback allows the device to achieve “zero delay” between the input clock and the output clocks. The PLL_SEL pin can be used to bypass the PLL for system test and debug purposes. In bypass mode, the reference clock is routed around the PLL and into the internal output dividers.