Integrated Device Technology Low Skew,1-to-22 Differential-to-3.3V LVPECL Fanout Buffer 8534AY-01LFT

Description
The 8534-01 is a low skew, 1-to-22 Differential-to-3.3V LVPECL Fanout Buffer. The 8534-01 has two selectable clock inputs. The CLK , nCLK pair can accept most standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the OE pin. The 8534-01's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.
Datasheet
Description
The 8534-01 is a low skew, 1-to-22 Differential-to-3.3V LVPECL Fanout Buffer. The 8534-01 has two selectable clock inputs. The CLK , nCLK pair can accept most standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the OE pin. The 8534-01's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.
Datasheet

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Low Skew,1-to-22 Differential-to-3.3V LVPECL Fanout Buffer - 8534AY-01LFT - Integrated Device Technology
San Jose, CA, USA
Low Skew,1-to-22 Differential-to-3.3V LVPECL Fanout Buffer
8534AY-01LFT
Low Skew,1-to-22 Differential-to-3.3V LVPECL Fanout Buffer 8534AY-01LFT
The 8534-01 is a low skew, 1-to-22 Differential-to-3.3V LVPECL Fanout Buffer. The 8534-01 has two selectable clock inputs. The CLK , nCLK pair can accept most standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertio n of the OE pin. The 8534-01's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.

The 8534-01 is a low skew, 1-to-22 Differential-to-3.3V LVPECL Fanout Buffer. The 8534-01 has two selectable clock inputs. The CLK , nCLK pair can accept most standard differential input levels. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The device is internally synchronized to eliminate runt pulses on the outputs during asynchronous assertion/deassertion of the OE pin. The 8534-01's low output and part-to-part skew characteristics make it ideal for workstation, server, and other high performance clock distribution applications.

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Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 8534AY-01LFT
Product Name Low Skew,1-to-22 Differential-to-3.3V LVPECL Fanout Buffer
Device Type Buffer
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