Integrated Device Technology Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer 85102AGILFT

Description
The 85102I is a low skew, high performance 1-to-2 Differential-to- HCSL fanout buffer. The 85102I has a differential clock input. The CLK0 , nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.
Datasheet
Description
The 85102I is a low skew, high performance 1-to-2 Differential-to- HCSL fanout buffer. The 85102I has a differential clock input. The CLK0 , nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.
Datasheet

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Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer - 85102AGILFT - Integrated Device Technology
San Jose, CA, USA
Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer
85102AGILFT
Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer 85102AGILFT
The 85102I is a low skew, high performance 1-to-2 Differential-to- HCSL fanout buffer. The 85102I has a differential clock input. The CLK0 , nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertio n of the clock enable pin. Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.

The 85102I is a low skew, high performance 1-to-2 Differential-to- HCSL fanout buffer. The 85102I has a differential clock input. The CLK0 , nCLK0 input pair can accept most standard differential input levels. The clock enable is internally synchronized to eliminate runt clock pulses on the output during asynchronous assertion/deassertion of the clock enable pin.

Guaranteed output and part-to-part skew characteristics make the 85102I ideal for those applications demanding well defined performance and repeatability.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 85102AGILFT
Product Name Low Skew,1-to-2 Differential/LVCMOS-to-0.7V HCSL Fanout Buffer
Technology CMOS
Device Type Buffer
Supply Voltage 3.3V
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