Integrated Device Technology Low Jitter, Telecom Rate-Conversion PLL 8400110EKILFT

Description
The 8400110I is a Low Jitter Telecom Rate- Conversion PLL that provides accurate and reliable frequency conversion. The 8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for a failure condition. In the event of a failure, the PLL continues to provide a stable free-running clock, ensuring system reliability.
  • Low Jitter, Telecom Rate-Conversion PLL - 8400110EKILFT - Integrated Device Technology
    Integrated Device Technology
Datasheet
Description
The 8400110I is a Low Jitter Telecom Rate- Conversion PLL that provides accurate and reliable frequency conversion. The 8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for a failure condition. In the event of a failure, the PLL continues to provide a stable free-running clock, ensuring system reliability.
Datasheet

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Low Jitter, Telecom Rate-Conversion PLL - 8400110EKILFT - Integrated Device Technology
Integrated Device Technology
San Jose, CA, USA
Low Jitter, Telecom Rate-Conversion PLL
8400110EKILFT
Low Jitter, Telecom Rate-Conversion PLL 8400110EKILFT
The 8400110I is a Low Jitter Telecom Rate- Conversion PLL that provides accurate and reliable frequency conversion. The 8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for a failure condition. In the event of a failure, the PLL continues to provide a stable free-running clock, ensuring system reliability.

The 8400110I is a Low Jitter Telecom Rate- Conversion PLL that provides accurate and reliable frequency conversion. The 8400110I generates a 65.536MHz clock that is either locked to the input reference or locked to the external crystal or oscillator. In the locked mode, the reference input is continuously monitored for a failure condition. In the event of a failure, the PLL continues to provide a stable free-running clock, ensuring system reliability.

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Technical Specifications

  Integrated Device Technology
Product Category IC Phase-locked Loops (PLL)
Product Number 8400110EKILFT
Product Name Low Jitter, Telecom Rate-Conversion PLL
Bus Interface LVCMOS
Package Type Surface Mount; VFQFPN
Supply Voltage 3.3 volts
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