Integrated Device Technology Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer 83940DYLFT

Description
The 83940D is a low skew, 1-to-18 LVPECL -to- LVCMOS / LVTTL Fanout Buffer. The 83940D has two selectable clock inputs. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS / LVTTL outputs are designed to drive 50ω series or parallel terminated transmission lines. The 83940D is characterized at full 3.3V and 2.5V or mixed3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940D ideal for those clock distribution applications demanding well defined performance and repeatability.
Datasheet
Description
The 83940D is a low skew, 1-to-18 LVPECL -to- LVCMOS / LVTTL Fanout Buffer. The 83940D has two selectable clock inputs. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS / LVTTL outputs are designed to drive 50ω series or parallel terminated transmission lines. The 83940D is characterized at full 3.3V and 2.5V or mixed3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940D ideal for those clock distribution applications demanding well defined performance and repeatability.
Datasheet

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Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer - 83940DYLFT - Integrated Device Technology
San Jose, CA, USA
Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer
83940DYLFT
Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer 83940DYLFT
The 83940D is a low skew, 1-to-18 LVPECL -to- LVCMOS / LVTTL Fanout Buffer. The 83940D has two selectable clock inputs. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS / LVTTL outputs are designed to drive 50ω series or parallel terminated transmission lines. The 83940D is characterized at full 3.3V and 2.5V or mixed3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940D ideal for those clock distribution applications demanding well defined performance and repeatability.

The 83940D is a low skew, 1-to-18 LVPECL -to- LVCMOS / LVTTL Fanout Buffer. The 83940D has two selectable clock inputs. The PCLK , nPCLK pair can accept LVPECL , CML , or SSTL input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS / LVTTL outputs are designed to drive 50Ω series or parallel terminated transmission lines. The 83940D is characterized at full 3.3V and 2.5V or mixed3.3V core, 2.5V output operating supply modes. Guaranteed output and part-to-part skew characteristics make the 83940D ideal for those clock distribution applications demanding well defined performance and repeatability.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 83940DYLFT
Product Name Low Skew,1-to-18 LVPECL-to-LVCMOS/LVTTL Fanout Buffer
Technology CMOS
Device Type Buffer
Supply Voltage 2.5V; 3.3V
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