Integrated Device Technology T1/E1/OC3 WAN PLL With Single Reference Input 82V3011PVG

The 82V3011 is a T1/E1/ OC3 WAN PLL with single reference input. It contains a Digital Phase-Locked Loop ( DPLL ), which generates low jitter ST - BUS and 19.44 MHz clock and framing signals that are phase locked to an 8 kHz, 1.544 MHz, 2.048 MHz or 19.44 MHz input reference. The 82V3011 provides 9 types of clock signals (C1.5o, C3o, C6o, C2o, C4o, C8o, C16o, C19o, C32o) and 7 types of framing signals (F0o, F8o, F16o, F19o, F32o, RSP , TSP ) for multitrunk T1/E1 and STS3 / OC3 links. The 82V3011 is compliant with AT &T TR62411 , Telcordia GR -1244- CORE Stratum 4 Enhanced and Stratum 4, and ETSI ETS 300 011. It meets the jitter/wander tolerance, jitter/wander transfer, intrinsic jitter/wander, frequency accuracy, capture range, phase change slope, holdover frequency accuracy and MTIE (Maximum Time Interval Error) requirements for these specifications. The 82V3011 can be used in synchronization and timing control for T1, E1 and OC3 systems, or used as ST - BUS clock and frame pulse source. It also can be used in access switch, access routers, ATM edge switches, wireless base station controllers, or IADs (Integrated Access Devices), PBXs, line cards and SONET / SDH equipments.