Integrated Device Technology 28-Bit 1:2 Registered Buffer with Parity 74SSTUBF32865ABKG

Description
Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.
Datasheet
Description
Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.
Datasheet

Suppliers

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28-Bit 1:2 Registered Buffer with Parity - 74SSTUBF32865ABKG - Integrated Device Technology
San Jose, CA, USA
28-Bit 1:2 Registered Buffer with Parity
74SSTUBF32865ABKG
28-Bit 1:2 Registered Buffer with Parity 74SSTUBF32865ABKG
Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.

Along with CSPUA877A or 98ULPA877A DDR2 PLL Provides a fully JEDEC compliant solution for DDR2 RDIMMs for 400, 533, 667 and 800MHz.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 74SSTUBF32865ABKG
Product Name 28-Bit 1:2 Registered Buffer with Parity
Device Type Buffer
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