Integrated Device Technology 16K x 18 / 32K x 9 SuperSync II FIFO, 3.3V 72V273L10PFG

Description
The 72V273 32K x 9/16K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.
Datasheet
Description
The 72V273 32K x 9/16K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.
Datasheet

Suppliers

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16K x 18 / 32K x 9 SuperSync II FIFO, 3.3V - 72V273L10PFG - Integrated Device Technology
San Jose, CA, USA
16K x 18 / 32K x 9 SuperSync II FIFO, 3.3V
72V273L10PFG
16K x 18 / 32K x 9 SuperSync II FIFO, 3.3V 72V273L10PFG
The 72V273 32K x 9/16K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.

The 72V273 32K x 9/16K x 18 SuperSync II FIFO memory has flexible x9/x18 Bus-Matching on both read and write ports. The variable clock cycle counting delay associated with the latency period found on previous SuperSync devices has been eliminated. SuperSync II FIFOs are appropriate for network, video, telecommunications, data communications and other applications that need to buffer large amounts of data and match buses of unequal sizes.

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Technical Specifications

  Integrated Device Technology
Product Category Memory Chips
Product Number 72V273L10PFG
Product Name 16K x 18 / 32K x 9 SuperSync II FIFO, 3.3V
Memory Category FIFO
Logic Family TTL
Data Rate 100 MHz
Operating Temperature 0 to 70 C (32 to 158 F)
Density 288 kbits
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