The 7201 is a 512 x 9 dual-port FIFO memory that loads and empties data on a first-in/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow. It has a Retransmit ( RT ) capability that allows for reset of the read pointer to its initial position when RT is pulsed LOW . It is designed for those applications requiring asynchronous and simultaneous read/writes in multiprocessing and rate buffer applications.
| Integrated Device Technology | |
|---|---|
| Product Category | Memory Chips |
| Product Number | 7201LA50TDB |
| Product Name | 512 x 9 AsyncFIFO, 5.0V |
| Memory Category | FIFO |
| Logic Family | TTL |
| Access Time | 50 ns |
| Operating Temperature | -55 to 125 C (-67 to 257 F) |
| Density | 4 kbits |
