Integrated Device Technology Zero Delay, Low Skew Buffer 574MLFT

Description
The 574 is a low jitter, low-skew, high performance PLL -based zero delay buffer for high speed applications. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN , the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the amount of propagation delay of the external element.
Datasheet
Description
The 574 is a low jitter, low-skew, high performance PLL -based zero delay buffer for high speed applications. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN , the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the amount of propagation delay of the external element.
Datasheet

Suppliers

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Product
Description
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Zero Delay, Low Skew Buffer - 574MLFT - Integrated Device Technology
San Jose, CA, USA
Zero Delay, Low Skew Buffer
574MLFT
Zero Delay, Low Skew Buffer 574MLFT
The 574 is a low jitter, low-skew, high performance PLL -based zero delay buffer for high speed applications. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN , the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the amount of propagation delay of the external element.

The 574 is a low jitter, low-skew, high performance PLL -based zero delay buffer for high speed applications. Based on IDT 's proprietary low jitter Phase Locked Loop ( PLL ) techniques, the device provides four low skew outputs at speeds up to 160 MHz at 3.3 V. When one of the outputs is connected directly to FBIN , the rising edge of each output is aligned with the rising edge of the input clock. External delay elements connected in the feedback loops will cause the outputs to occur before the inputs by the amount of propagation delay of the external element.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 574MLFT
Product Name Zero Delay, Low Skew Buffer
Device Type Buffer
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