Integrated Device Technology Clock Slicer User Configurable Zero Delay Buffer 527R-01ILF

Description
The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop ( PLL ) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.
Datasheet
Description
The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop ( PLL ) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.
Datasheet

Suppliers

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Clock Slicer User Configurable Zero Delay Buffer - 527R-01ILF - Integrated Device Technology
San Jose, CA, USA
Clock Slicer User Configurable Zero Delay Buffer
527R-01ILF
Clock Slicer User Configurable Zero Delay Buffer 527R-01ILF
The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop ( PLL ) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.

The 527-01 Clock Slicer is the most flexible way to generate an output clock from an input clock with zero skew. The user can easily configure the device to produce nearly any output clock that is multiplied or divided from the input clock. The part supports non-integer multiplications and divisions. A SYNC pulse indicates when the rising clock edges are aligned with zero skew. Using Phase-Locked Loop ( PLL ) techniques, the device accepts an input clock up to 200 MHz and produces an output clock up to 160 MHz. The 527-01 aligns rising edges on ICLK and FBIN at a ratio determined by the reference and feedback dividers. For configurable clocks that do not require zero delay, use the 525.

Supplier's Site Datasheet

Technical Specifications

  Integrated Device Technology
Product Category IC Interfaces
Product Number 527R-01ILF
Product Name Clock Slicer User Configurable Zero Delay Buffer
Device Type Buffer
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