The CS5510/11/12/13 family of low-cost, easy-to-use, Delta Sigma analog-to-digital (A/D) converters use charge-balance techniques to achieve 16-bit (CS5510/11) and 20-bit (CS5512/13) performance. The A/D converters are available in a space-efficient 8-pin SOIC package and are optimized for measuring signals in weigh scale, process control, and other industrial applications. To accommodate these applications, the A/D converters include a fourth-order Delta Sigma modulator and digital filter. When configured with an external master clock of 32.768 kHz, the filter in the CS5510/12 family members provides better than 80 dB of simultaneous 50 Hz and 60 Hz line rejection and outputs conversion words at 53.5 Hz. The CS5511/13 family members include an on-chip oscillator, which eliminates the need for an external clock source. Low power, a flexible supply, a compact pin-out and ease of use make these products ideal solutions for cost-conscious and space-constrained applications.
Features
Delta Sigma A/D converters
Linearity error: 0.0015% FS
Noise-free resolution: up to 17 bits
Differential bipolar analog inputs
VREF input range from 250 mV to 5 V
50 Hz/60 Hz simultaneous rejection (CS5510/12)
16 Hz to 326 Hz output word rate
On-chip oscillator (CS5511/13)
Power supply configurations:
V+ = 5 V, V- = 0 V
Multiple dual supply arrangements
Low power consumption
Normal mode: 2.5 mW
Sleep mode: 10 µW
Package: 8-pin SOIC (low-cost, compact); lead-free assembly
The CS5510/11/12/13 family of low-cost, easy-to-use, Delta Sigma analog-to-digital (A/D) converters use charge-balance techniques to achieve 16-bit (CS5510/11) and 20-bit (CS5512/13) performance. The A/D converters are available in a space-efficient 8-pin SOIC package and are optimized for measuring signals in weigh scale, process control, and other industrial applications. To accommodate these applications, the A/D converters include a fourth-order Delta Sigma modulator and digital filter. When configured with an external master clock of 32.768 kHz, the filter in the CS5510/12 family members provides better than 80 dB of simultaneous 50 Hz and 60 Hz line rejection and outputs conversion words at 53.5 Hz. The CS5511/13 family members include an on-chip oscillator, which eliminates the need for an external clock source. Low power, a flexible supply, a compact pin-out and ease of use make these products ideal solutions for cost-conscious and space-constrained applications.
Features
- Delta Sigma A/D converters
- Linearity error: 0.0015% FS
- Noise-free resolution: up to 17 bits
- Differential bipolar analog inputs
- VREF input range from 250 mV to 5 V
- 50 Hz/60 Hz simultaneous rejection (CS5510/12)
- 16 Hz to 326 Hz output word rate
- On-chip oscillator (CS5511/13)
- Power supply configurations:
- V+ = 5 V, V- = 0 V
- Multiple dual supply arrangements
- Low power consumption
- Normal mode: 2.5 mW
- Sleep mode: 10 µW
- Package: 8-pin SOIC (low-cost, compact); lead-free assembly
