Acromag, Inc. PCI Express Carrier Cards for AcroPack® Modules APCe7022

Description
This device meets or exceeds all written PCI Express specifications per revision 2.1. Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe). The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each. I/O Interface Connector P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch). J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962). P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT ). J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1). P6 (JTAG): 14-pin header (Molex 87832-1420). Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments. Ease of Use A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system. A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained. Physical Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm). Environmental Operating temperature: -40 to +85°C with 200 LFM airflow. Storage temperature: -55 to +125°C. Relative humidity: 5 to 95% non-condensing. Power +3.3 Volts (±5%): 0.5 A typical. +12 Volts (±8%): 27mA typical. The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the +3.3 Volt host power. The +5 Volt and -12 Volt supply is sourced from +12 Volt host power. Features & Benefits • Two AcroPack or mini-PCIe module slots support any combination of I/O functions • PCI Express compliant • Plug-and-play carrier configuration and interrupt support • Fused +1.5V, +3.3V, +5V, +12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module. • Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals • Extended temperature range • DIP switch card identification • Standard 14-pin Xilinx JTAG programming header • Software development tools for VxWorks, Linux, and Windows environments
Datasheet
Description
This device meets or exceeds all written PCI Express specifications per revision 2.1. Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe). The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each. I/O Interface Connector P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch). J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962). P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT ). J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1). P6 (JTAG): 14-pin header (Molex 87832-1420). Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments. Ease of Use A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system. A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained. Physical Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm). Environmental Operating temperature: -40 to +85°C with 200 LFM airflow. Storage temperature: -55 to +125°C. Relative humidity: 5 to 95% non-condensing. Power +3.3 Volts (±5%): 0.5 A typical. +12 Volts (±8%): 27mA typical. The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the +3.3 Volt host power. The +5 Volt and -12 Volt supply is sourced from +12 Volt host power. Features & Benefits • Two AcroPack or mini-PCIe module slots support any combination of I/O functions • PCI Express compliant • Plug-and-play carrier configuration and interrupt support • Fused +1.5V, +3.3V, +5V, +12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module. • Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals • Extended temperature range • DIP switch card identification • Standard 14-pin Xilinx JTAG programming header • Software development tools for VxWorks, Linux, and Windows environments
Datasheet

Suppliers

Company
Product
Description
Supplier Links
PCI Express Carrier Cards for AcroPack® Modules - APCe7022 - Acromag, Inc.
Wixom, MI, United States
PCI Express Carrier Cards for AcroPack® Modules
APCe7022
PCI Express Carrier Cards for AcroPack® Modules APCe7022
This device meets or exceeds all written PCI Express specifications per revision 2.1. Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe). The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each. I/O Interface Connector P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch). J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962). P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT ). J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1). P6 (JTAG): 14-pin header (Molex 87832-1420). Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments. Ease of Use A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system. A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained. Physical Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm). Environmental Operating temperature: -40 to +85°C with 200 LFM airflow. Storage temperature: -55 to +125°C. Relative humidity: 5 to 95% non-condensing. Power +3.3 Volts (±5%): 0.5 A typical. +12 Volts (±8%): 27mA typical. The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the +3.3 Volt host power. The +5 Volt and -12 Volt supply is sourced from +12 Volt host power. Features & Benefits • Two AcroPack or mini-PCIe module slots support any combination of I/O functions • PCI Express compliant • Plug-and-play carrier configuration and interrupt support • Fused +1.5V, +3.3V, +5V, +12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module. • Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals • Extended temperature range • DIP switch card identification • Standard 14-pin Xilinx JTAG programming header • Software development tools for VxWorks, Linux, and Windows environments

This device meets or exceeds all written PCI Express specifications per revision 2.1.

Includes a PCIe Gen 2 switch to expand the single host PCIe port to two ports, one to each device (AcroPack or mini-PCIe).

The host port consists of four PCIe lanes, each of the mini-PCIe sites have one lane each.

I/O Interface

Connector

P1 (PCIe Bus): PCIe V2.1 x4 lane (PCIe Gen 2 Switch).
J3 (Carrier Field I/O): 68-pin, stacked, CHAMP (TE Connectivity 5787962).
P2, 3 (AcroPack Field I/O): 100-pin socket (Samtec SS5-50-3.00-L-D-K-RT).
J1, 2 (Mini-PCIe): 52-pin socket (TE Connectivity 1759547-1).
P6 (JTAG): 14-pin header (Molex 87832-1420).

Gold plating in the connection area, M2.5 screws and spacers provide excellent connection integrity and stability for harsh environments.

Ease of Use

A unique carrier and site number can be set for each AcroPack site by a DIP switch. This provides the capability to distinguish a particular AcroPack module from others when multiple instances of the same module are used in a system.

A standard 14-pin Xilinx JTAG programming header is provided for programming and debugging the FPGA on some AcroPack modules. The JTAG ports of the two AcroPack modules are daisy-chained.

Physical

Physical Configuration: PCIe x4 lane. Length: 6.3 inches (160.02 mm). Height: 4.375 inches (111.12 mm).

Environmental

Operating temperature: -40 to +85°C with 200 LFM airflow.

Storage temperature: -55 to +125°C.

Relative humidity: 5 to 95% non-condensing.

Power
+3.3 Volts (±5%): 0.5 A typical.
+12 Volts (±8%): 27mA typical.

The APCe7020E-LF has three DC/DC converters to provide the power supply voltages to the AcroPack modules that are not present at the host interface. The +1.5 Volt supply is sourced from the +3.3 Volt host power. The +5 Volt and -12 Volt supply is sourced from +12 Volt host power.

Features & Benefits

• Two AcroPack or mini-PCIe module slots support any combination of I/O functions

• PCI Express compliant

• Plug-and-play carrier configuration and interrupt support

• Fused +1.5V, +3.3V, +5V, +12V, and -12V DC power is provided. A fuse is present on each supply line serving each AcroPack module.

• Front panel 68-pin VHDC1 CHAMP 0.8 connectors for field I/O signals

• Extended temperature range

• DIP switch card identification

• Standard 14-pin Xilinx JTAG programming header

• Software development tools for VxWorks, Linux, and Windows environments

Supplier's Site Datasheet

Technical Specifications

  Acromag, Inc.
Product Category Carrier Cards and Carrier Boards
Product Number APCe7022
Product Name PCI Express Carrier Cards for AcroPack® Modules
Carrier Type PCI Express
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