Nexperia B.V. 16-bit D-type transparent latch; 30 Ohm series termination resistors; 5 V tolerant inputs/outputs; 3-state 74LVC162373ADGG,11

The 74LVC162373A and 74LVCH162373A are 16-bit D-type transparent latches with 30 Ω termination resistors and 3-state outputs. The 74LVCH162373A has separate D-type inputs with bus hold for each latch. Both devices can be used as two 8-bit transparent latches or a single 16-bit transparent latch. Both devices feature two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.

These devices are fully specified for partial power down applications using I_OFF. The I_OFF circuitry disables the output, preventing the potentially damaging backflow current through the devices when they are powered down.

Features and benefits

• Overvoltage tolerant inputs to 5.5 V
• Wide supply voltage range from 1.2 V to 3.6 V
• CMOS low power consumption
• Multibyte flow-through standard pinout architecture
• Multiple low inductance supply pins for minimum noise and ground bounce
• Direct interface with TTL levels
• All data inputs have bus hold (74LVCH162373A only)
• I_OFF circuitry provides partial Power-down mode operation
• Complies with JEDEC standard:
• JESD8-7A (1.65 V to 1.95 V)
• JESD8-5A (2.3 V to 2.7 V)
• JESD8-C/JESD36 (2.7 V to 3.6 V)
• ESD protection:
• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-TSSOP

IC 16BIT D TRANSP LATCH 48TSSOP

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-TSSOP

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-TSSOP

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-TSSOP