Nexperia B.V. Dual D-type flip-flop with set and reset; positive-edge trigger 74LV74PW,118

Description
The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 5.5 V Optimized for low voltage applications from 1.0 V to 3.6 V CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Direct interface with TTL levels (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C
  • Dual D-type flip-flop with set and reset; positive-edge trigger - 74LV74PW,118 - Nexperia B.V.
    Nexperia B.V.
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  • Flip Flops - 1727-6363-6-ND - DigiKey
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  • 74LV74PW,118 - Rochester Electronics
    Rochester Electronics
  • Logic - Flip Flops - 74LV74PW,118 - Lingto Electronic Limited
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  • Flip Flops - 74LV74PW,118 - Quarktwin Technology Ltd.
    Quarktwin Technology Ltd.
  • Flip-Flop, D-Type, 100Mhz, Tssop-14; Logic Family / Base Number Nexperia - 85X3061 - Newark, An Avnet Company
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Request a Quote Datasheet
Description
The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 5.5 V Optimized for low voltage applications from 1.0 V to 3.6 V CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Direct interface with TTL levels (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
Dual D-type flip-flop with set and reset; positive-edge trigger - 74LV74PW,118 - Nexperia B.V.
Nexperia B.V.
Nijmegen, Netherlands
Dual D-type flip-flop with set and reset; positive-edge trigger
74LV74PW,118
Dual D-type flip-flop with set and reset; positive-edge trigger 74LV74PW,118
The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 5.5 V Optimized for low voltage applications from 1.0 V to 3.6 V CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Direct interface with TTL levels (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74LV74 is a dual positive edge triggered D-type flip-flop with individual data (nD), clock (nCP), set (nSD) and reset (nRD) inputs, and complementary nQ and nQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the nQ output. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

Features and benefits

  • Wide supply voltage range from 1.0 V to 5.5 V
  • Optimized for low voltage applications from 1.0 V to 3.6 V
  • CMOS low power dissipation
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Direct interface with TTL levels (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 1727-6363-1-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6363-1-ND
Flip Flops 1727-6363-1-ND
"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Flip Flops - 1727-6363-2-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6363-2-ND
Flip Flops 1727-6363-2-ND
"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
Flip Flops - 1727-6363-6-ND - DigiKey
DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-6363-6-ND
Flip Flops 1727-6363-6-ND
"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

"Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173"", 4.40mm Width)"

Buy Now Datasheet
- 74LV74PW,118 - Rochester Electronics
Rochester Electronics
Newburyport, MA, United States
74LV74PW,118
74LV74PW,118
D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14

D Flip-Flop, LV/LV-A/LVX/H Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMOS, PDSO14

Supplier's Site Datasheet
Win Source Electronics
Laguna Hills, CA, United States
Logic - Logic - Flip Flops - 74LV74PW,118
1009091-74LV74PW,118
Logic - Logic - Flip Flops - 74LV74PW,118 1009091-74LV74PW,118
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1009091-74LV74PW,118 Packaging: Reel - TR Type: D-Type Mounting: SMD (SMT) Output Type: Differential Current - Output High, Low: 12mA, 12mA Number of Elements: 2 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 17ns @ 5V, 50pF Trigger Type: Positive Edge Current - Quiescent: 80μA Input Capacitance: 3.5pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 125°C (TA) Dimension: 14-TSSOP (0.173", 4.40mm Width) Purpose: Set(Preset) and Reset Supply Voltage - Operating: 1 V to 5.5 V Max Frequency: 110MHz Popularity: Medium Fake Threat In the Open Market: 45 pct. Supply and Demand Status: Sufficient

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1009091-74LV74PW,118
Packaging: Reel - TR
Type: D-Type
Mounting: SMD (SMT)
Output Type: Differential
Current - Output High, Low: 12mA, 12mA
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 17ns @ 5V, 50pF
Trigger Type: Positive Edge
Current - Quiescent: 80μA
Input Capacitance: 3.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: 14-TSSOP (0.173", 4.40mm Width)
Purpose: Set(Preset) and Reset
Supply Voltage - Operating: 1 V to 5.5 V
Max Frequency: 110MHz
Popularity: Medium
Fake Threat In the Open Market: 45 pct.
Supply and Demand Status: Sufficient

Buy Now Datasheet
Logic - Flip Flops - 74LV74PW,118 - Lingto Electronic Limited
Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74LV74PW,118
Logic - Flip Flops 74LV74PW,118
IC FF D-TYPE DUAL 1BIT 14TSSOP

IC FF D-TYPE DUAL 1BIT 14TSSOP

Supplier's Site Datasheet
Flip Flops - 74LV74PW,118 - Quarktwin Technology Ltd.
Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74LV74PW,118
Flip Flops 74LV74PW,118
Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Flip Flop 2 Element D-Type 1 Bit Positive Edge 14-TSSOP (0.173", 4.40mm Width)

Buy Now Datasheet
Flip-Flop, D-Type, 100Mhz, Tssop-14; Logic Family / Base Number Nexperia - 85X3061 - Newark, An Avnet Company
Newark, An Avnet Company
Chicago, IL, United States
Flip-Flop, D-Type, 100Mhz, Tssop-14; Logic Family / Base Number Nexperia
85X3061
Flip-Flop, D-Type, 100Mhz, Tssop-14; Logic Family / Base Number Nexperia 85X3061
FLIP-FLOP, D-TYPE, 100MHZ, TSSOP-14; Logic Family / Base Number:74LV74; Flip-Flop Type:D; Propagation Delay:-; Frequency:100MHz; Output Current:25mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

FLIP-FLOP, D-TYPE, 100MHZ, TSSOP-14; Logic Family / Base Number:74LV74; Flip-Flop Type:D; Propagation Delay:-; Frequency:100MHz; Output Current:25mA; Logic Case Style:TSSOP; No. of Pins:14Pins; Trigger Type:Positive Edge; IC Output RoHS Compliant: Yes

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey Rochester Electronics Win Source Electronics Lingto Electronic Limited Quarktwin Technology Ltd. Newark, An Avnet Company
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74LV74PW,118 1727-6363-1-ND 74LV74PW,118 1009091-74LV74PW,118 74LV74PW,118 74LV74PW,118 85X3061
Product Name Dual D-type flip-flop with set and reset; positive-edge trigger Flip Flops Logic - Logic - Flip Flops - 74LV74PW,118 Logic - Flip Flops Flip Flops Flip-Flop, D-Type, 100Mhz, Tssop-14; Logic Family / Base Number Nexperia
Flip-Flop Type D D D
Triggering Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered Positive-edge Triggered; Positive Edge
Supply Voltage +7 1V ~ 5.5V 1 V ~ 5.5 V 1V ~ 5.5V
Features ESD Protection
Operating Temperature 125 C (257 F) -40 to 125 C (-40 to 257 F) -40 to 125 C (-40 to 257 F) -40 to 125 C (-40 to 257 F)
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