Nexperia B.V. Octal D-type transparent latch; 3-state 74HC573D,653

Description
The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC573: CMOS level For 74HCT573: TTL level Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors and microcomputers 3-state non-inverting outputs for bus-oriented applications Common 3-state output enable input Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Request a Quote Datasheet
Description
The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC573: CMOS level For 74HCT573: TTL level Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors and microcomputers 3-state non-inverting outputs for bus-oriented applications Common 3-state output enable input Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
Octal D-type transparent latch; 3-state - 74HC573D,653 - Nexperia B.V.
Nijmegen, Netherlands
Octal D-type transparent latch; 3-state
74HC573D,653
Octal D-type transparent latch; 3-state 74HC573D,653
The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Input levels: For 74HC573: CMOS level For 74HCT573: TTL level Inputs and outputs on opposite sides of package allowing easy interface with microprocessors Useful as input or output port for microprocessors and microcomputers 3-state non-inverting outputs for bus-oriented applications Common 3-state output enable input Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC573; 74HCT573 is an 8-bit D-type transparent latch with 3-state outputs. The device features latch enable (LE) and output enable (OE) inputs. When LE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of LE. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Input levels:
    • For 74HC573: CMOS level
    • For 74HCT573: TTL level
  • Inputs and outputs on opposite sides of package allowing easy interface with microprocessors
  • Useful as input or output port for microprocessors and microcomputers
  • 3-state non-inverting outputs for bus-oriented applications
  • Common 3-state output enable input
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Latches - 1727-2818-6-ND - DigiKey
Thief River Falls, MN, United States
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

Buy Now Datasheet
Latches - 1727-2818-1-ND - DigiKey
Thief River Falls, MN, United States
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

Buy Now Datasheet
Latches - 1727-2818-2-ND - DigiKey
Thief River Falls, MN, United States
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

Buy Now Datasheet
IC LATCH OCTAL D 3STATE 20SOIC

IC LATCH OCTAL D 3STATE 20SOIC

Supplier's Site Datasheet
Latch ICs - 2194269 - RS Components, Ltd.
Corby, Northants, United Kingdom
Latch ICs
2194269
Latch ICs 2194269
Latches,74HC573D,653

Latches,74HC573D,653

Supplier's Site
Latch ICs - 2194271P - RS Components, Ltd.
Corby, Northants, United Kingdom
Latch ICs
2194271P
Latch ICs 2194271P
Latches,74HC573D,653

Latches,74HC573D,653

Supplier's Site
Latch ICs - 2194271 - RS Components, Ltd.
Corby, Northants, United Kingdom
Latch ICs
2194271
Latch ICs 2194271
Latches,74HC573D,653

Latches,74HC573D,653

Supplier's Site
Latches - 74HC573D,653 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SO

Buy Now Datasheet
Octal D-Latch, 3-State, Soic-20; Logic Family / Base Number Nexperia - 11N8543 - Newark, An Avnet Company
Chicago, IL, United States
Octal D-Latch, 3-State, Soic-20; Logic Family / Base Number Nexperia
11N8543
Octal D-Latch, 3-State, Soic-20; Logic Family / Base Number Nexperia 11N8543
OCTAL D-LATCH, 3-STATE, SOIC-20; Logic Family / Base Number:74HC573; Latch Type:Transparent; IC Output Type:Tri State; Propagation Delay:14ns; Output Current:7.8mA; Logic Case Style:SOIC; No. of Pins:20Pins; Supply Voltage Min:2V RoHS Compliant: Yes

OCTAL D-LATCH, 3-STATE, SOIC-20; Logic Family / Base Number:74HC573; Latch Type:Transparent; IC Output Type:Tri State; Propagation Delay:14ns; Output Current:7.8mA; Logic Case Style:SOIC; No. of Pins:20Pins; Supply Voltage Min:2V RoHS Compliant: Yes

Supplier's Site Datasheet
Logic - Latches - 74HC573D,653 - Lingto Electronic Limited
Shenzhen, China
Logic - Latches
74HC573D,653
Logic - Latches 74HC573D,653
IC LATCH OCTAL D 3STATE 20SOIC

IC LATCH OCTAL D 3STATE 20SOIC

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Latches - 74HC573D,653 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Latches
74HC573D,653
Integrated Circuits (ICs) - Logic - Latches 74HC573D,653
IC D-TYPE TRANSP SGL 8:8 20SO

IC D-TYPE TRANSP SGL 8:8 20SO

Supplier's Site
Futian, Shenzhen, China
Logic ICs >> Latches
74HC573D,653
Logic ICs >> Latches 74HC573D,653
D-Typelocking Latch 2V~6V 14ns SOIC-20-300mil Latches ROHS

D-Typelocking Latch 2V~6V 14ns SOIC-20-300mil Latches ROHS

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. DigiKey ODG (Origin Data Global) RS Components, Ltd. Quarktwin Technology Ltd. Newark, An Avnet Company Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited LCSC Electronics Technology (HK) Limited
Product Category Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches Logic Latches
Product Number 74HC573D,653 1727-2818-6-ND 74HC573D,653 2194269 74HC573D,653 11N8543 74HC573D,653 74HC573D,653 74HC573D,653
Product Name Octal D-type transparent latch; 3-state Latches Latches Latch ICs Latches Octal D-Latch, 3-State, Soic-20; Logic Family / Base Number Nexperia Logic - Latches Integrated Circuits (ICs) - Logic - Latches Logic ICs >> Latches
Latch Type Transparent-D Transparent-D Transparent-D D; Transparent-D D-Typelocking Latch
Output Characteristics 3-State 3-State 3-State; 3 State Tri-State
Features ESD Protection
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V 2V ~ 6V 2V ~ 6V 2V~6V
Propagation Delay 14 ns 14 ns 14 ns 14 ns 14 ns
Unlock Full Specs
to access all available technical data

Similar Products

Octal D-type transparent latch; 3-state - 74ALVC573PW,112 - Nexperia B.V.
Specs
Latch Type Transparent-D
Output Characteristics 3-State
Features ESD Protection
View Details
5 suppliers
Octal D-type transparant latch; 3-state - 74AHC373D,118 - Nexperia B.V.
Specs
Latch Type Transparent-D
Output Characteristics 3-State
Features ESD Protection
View Details
4 suppliers
Octal D-type transparent latch; 3-state - 74HC373BQ-Q100,115 - Nexperia B.V.
Specs
Latch Type Transparent-D
Output Characteristics 3-State
Features ESD Protection
View Details
5 suppliers
Latches - 74HC573DB,118-ND - DigiKey
Specs
Latch Type Transparent-D
Output Characteristics 3-State
Supply Voltage 2V ~ 6V
View Details
4 suppliers