Nexperia B.V. Dual JK flip-flop with reset; negative-edge trigger 74HC107D,653

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Dual JK flip-flop with reset; negative-edge trigger - 74HC107D,653 - Nexperia B.V.
Nijmegen, Netherlands
Dual JK flip-flop with reset; negative-edge trigger
74HC107D,653
Dual JK flip-flop with reset; negative-edge trigger 74HC107D,653
The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC. Features and benefits Wide supply voltage range from 2.0 V to 6.0 V CMOS low power dissipation High noise immunity Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V) Input levels: The 74HC107: CMOS levels The 74HCT107: TTL levels ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C

The 74HC107; 74HCT107 is a dual negative edge triggered JK flip-flop featuring individual J and K inputs, clock (CP) and reset (R) inputs and complementary Q and Q outputs. The reset is an asynchronous active LOW input and operates independently of the clock input. The J and K inputs control the state changes of the flip-flops as described in the mode select function table. The J and K inputs must be stable one set-up time prior to the HIGH-to-LOW clock transition for predictable operation. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Features and benefits

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards:
    • JESD8C (2.7 V to 3.6 V)
    • JESD7A (2.0 V to 6.0 V)
  • Input levels:
    • The 74HC107: CMOS levels
    • The 74HCT107: TTL levels
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Supplier's Site Datasheet
Flip Flops - 74HC107D,653 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flops
74HC107D,653
Flip Flops 74HC107D,653
Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Logic - Flip Flops - 74HC107D,653 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74HC107D,653
Logic - Flip Flops 74HC107D,653
IC FF JK TYPE DUAL 1BIT 14SO

IC FF JK TYPE DUAL 1BIT 14SO

Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Flip Flops - 74HC107D,653 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Flip Flops
74HC107D,653
Integrated Circuits (ICs) - Logic - Flip Flops 74HC107D,653
IC FF JK TYPE DUAL 1BIT 14SO

IC FF JK TYPE DUAL 1BIT 14SO

Supplier's Site
 - 74HC107D,653 - Rochester Electronics
Newburyport, MA, United States
Nexperia 74HC107D - J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO14

Nexperia 74HC107D - J-K Flip-Flop, HC/UH Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO14

Supplier's Site Datasheet
Flip Flops - 1727-4063-6-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4063-6-ND
Flip Flops 1727-4063-6-ND
Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-4063-2-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4063-2-ND
Flip Flops 1727-4063-2-ND
Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Flip Flops - 1727-4063-1-ND - DigiKey
Thief River Falls, MN, United States
Flip Flops
1727-4063-1-ND
Flip Flops 1727-4063-1-ND
Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Flip Flop 2 Element JK Type 1 Bit Negative Edge 14-SOIC (0.154", 3.90mm Width)

Supplier's Site Datasheet
Yishun, Singapore
Logic - Logic - Flip Flops - 74HC107D,653
1008178-74HC107D,653
Logic - Logic - Flip Flops - 74HC107D,653 1008178-74HC107D,653
Manufacturer: Nexperia USA Inc. Win Source Part Number: 1008178-74HC107D,653 Packaging: Reel - TR Type: JK Type Mounting: SMD (SMT) Output Type: Differential Current - Output High, Low: 5.2mA, 5.2mA Number of Elements: 2 Number of Bits per Element: 1 Max Propagation Delay @ V, Max CL: 27ns @ 6V, 50pF Trigger Type: Negative Edge Current - Quiescent: 4μA Input Capacitance: 3.5pF Categories: Integrated Circuits Status: Active Temperature Range - Operating: -40°C to 125°C (TA) Dimension: 14-SOIC (0.154", 3.90mm Width) Purpose: Reset Supply Voltage - Operating: 2 V to 6 V Max Frequency: 85MHz Popularity: Medium Fake Threat In the Open Market: 49 pct. Supply and Demand Status: Balance

Manufacturer: Nexperia USA Inc.
Win Source Part Number: 1008178-74HC107D,653
Packaging: Reel - TR
Type: JK Type
Mounting: SMD (SMT)
Output Type: Differential
Current - Output High, Low: 5.2mA, 5.2mA
Number of Elements: 2
Number of Bits per Element: 1
Max Propagation Delay @ V, Max CL: 27ns @ 6V, 50pF
Trigger Type: Negative Edge
Current - Quiescent: 4μA
Input Capacitance: 3.5pF
Categories: Integrated Circuits
Status: Active
Temperature Range - Operating: -40°C to 125°C (TA)
Dimension: 14-SOIC (0.154", 3.90mm Width)
Purpose: Reset
Supply Voltage - Operating: 2 V to 6 V
Max Frequency: 85MHz
Popularity: Medium
Fake Threat In the Open Market: 49 pct.
Supply and Demand Status: Balance

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd. Lingto Electronic Limited Shenzhen Shengyu Electronics Technology Limited Rochester Electronics DigiKey Win Source Electronics
Product Category Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops Flip-Flops
Product Number 74HC107D,653 74HC107D,653 74HC107D,653 74HC107D,653 74HC107D,653 1727-4063-6-ND 1008178-74HC107D,653
Product Name Dual JK flip-flop with reset; negative-edge trigger Flip Flops Logic - Flip Flops Integrated Circuits (ICs) - Logic - Flip Flops Flip Flops Logic - Logic - Flip Flops - 74HC107D,653
Flip-Flop Type J-K J-K J-K
Triggering Negative-edge Triggered Negative-edge Triggered Negative-edge Triggered Negative-edge Triggered; Negative Edge
Supply Voltage 2.5V; 3V; 3.3V; 3.6V; 5V; 2.0 - 6.0 2V ~ 6V 2V ~ 6V 2 V ~ 6 V
Features ESD Protection
Propagation Delay 16 ns 27 ns 27 ns
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