Nexperia B.V. 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state 74ALVT16821DGG,118

Description
The 74ALVT16821 is a 20-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OEand 2OE), each controlling 10-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Operation of the nOEinput does not affect the state of the flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits Wide supply voltage range from 2.3 V to 3.6 V Overvoltage tolerant inputs to 5.5 V 20-bit positive-edge triggered register BiCMOS high speed and output drive Direct interface with TTL levels Bus hold on data inputs No bus current loading when output is tied to 5 V bus Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Request a Quote Datasheet
Description
The 74ALVT16821 is a 20-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OEand 2OE), each controlling 10-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Operation of the nOEinput does not affect the state of the flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits Wide supply voltage range from 2.3 V to 3.6 V Overvoltage tolerant inputs to 5.5 V 20-bit positive-edge triggered register BiCMOS high speed and output drive Direct interface with TTL levels Bus hold on data inputs No bus current loading when output is tied to 5 V bus Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Request a Quote Datasheet

Suppliers

Company
Product
Description
Supplier Links
20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state - 74ALVT16821DGG,118 - Nexperia B.V.
Nijmegen, Netherlands
20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state
74ALVT16821DGG,118
20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state 74ALVT16821DGG,118
The 74ALVT16821 is a 20-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OEand 2OE), each controlling 10-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Operation of the nOEinput does not affect the state of the flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs Features and benefits Wide supply voltage range from 2.3 V to 3.6 V Overvoltage tolerant inputs to 5.5 V 20-bit positive-edge triggered register BiCMOS high speed and output drive Direct interface with TTL levels Bus hold on data inputs No bus current loading when output is tied to 5 V bus Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

The 74ALVT16821 is a 20-bit positive-edge triggered D-type flip-flop with 3-state outputs.

The device can be used as two 10-bit flip-flops or one 20-bit flip-flop. The device features two clocks (1CP and 2CP) and two output enables (1OEand 2OE), each controlling 10-bits. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOEcauses the outputs to assume a high-impedance OFF-state. Operation of the nOEinput does not affect the state of the flip-flops. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs

Features and benefits

  • Wide supply voltage range from 2.3 V to 3.6 V
  • Overvoltage tolerant inputs to 5.5 V
  • 20-bit positive-edge triggered register
  • BiCMOS high speed and output drive
  • Direct interface with TTL levels
  • Bus hold on data inputs
  • No bus current loading when output is tied to 5 V bus
  • Power-up 3-state
  • IOFF circuitry provides partial Power-down mode operation
  • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Supplier's Site Datasheet
Flip Flops - 74ALVT16821DGG,118 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Flip Flop 2 Element D-Type 10 Bit Positive Edge 56-TFSOP (0.240", 6.10mm Width)

Flip Flop 2 Element D-Type 10 Bit Positive Edge 56-TFSOP (0.240", 6.10mm Width)

Buy Now Datasheet
Logic - Flip Flops - 74ALVT16821DGG,118 - Lingto Electronic Limited
Shenzhen, China
Logic - Flip Flops
74ALVT16821DGG,118
Logic - Flip Flops 74ALVT16821DGG,118
IC FF D-TYPE DUAL 10BIT 56TSSOP

IC FF D-TYPE DUAL 10BIT 56TSSOP

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Quarktwin Technology Ltd. Lingto Electronic Limited
Product Category Flip-Flops Flip-Flops Flip-Flops
Product Number 74ALVT16821DGG,118 74ALVT16821DGG,118 74ALVT16821DGG,118
Product Name 20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state Flip Flops Logic - Flip Flops
Flip-Flop Type D D
Triggering Positive-edge Triggered
Supply Voltage +4.6 3V; 3.6V; 2.3V ~ 2.7V, 3V ~ 3.6V
Output Characteristics 3-State
Features ESD Protection
Unlock Full Specs
to access all available technical data

Similar Products

Dual D-type flip-flop with set and reset; positive edge-trigger - 74HCT74BZZ - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage +7
View Details
4 suppliers
 - 74LVC1G74GF,115 - Rochester Electronics
Specs
Triggering Positive-edge Triggered
Package Type SOT1089
Logic Family CMOS
View Details
6 suppliers
Octal D-type flip-flop; positive edge-trigger; 3-state - 74HCT374D,653 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage +7
View Details
7 suppliers
Dual D-type flip-flop with set and reset; positive edge-trigger - 74HCT74D,653 - Nexperia B.V.
Specs
Flip-Flop Type D
Triggering Positive-edge Triggered
Supply Voltage +7
View Details
7 suppliers