Texas Instruments SN54HC109 Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 84150012A

The 84150012A is a dual J-K positive-edge-triggered flip-flop designed for versatile applications. It operates within a wide voltage range of 2 V to 6 V and features low input current of 1 OºA maximum, making it suitable for low-power designs with a maximum supply current of 40 OºA. The flip-flop can drive up to 10 LSTTL loads with a ¬±4 mA output drive at 5 V. It has a typical propagation delay of 12 ns, ensuring fast response times. This device includes preset (PRE) and clear (CLR) inputs that allow for setting or resetting the outputs independently of other inputs. When PRE and CLR are inactive, data from the J and K inputs is transferred to the outputs on the positive edge of the clock pulse. The flip-flop can also function as toggle or D-type flip-flops depending on the configuration of the J and K inputs. The 84150012A is packaged in a 20-pin LCCC format and is rated for operation in a temperature range of -55 to 125 ¬8C.