Features
Industry’s lowest active & sleep currents
160 uA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 uS wake-up time
1.5 uS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 16 kB Flash, 512 bytes SRAM
768 bytes of SRAM
0.9 V – 3.6 V operation
Silicon Labs
Done
Datasheet
Description
Features
Industry’s lowest active & sleep currents
160 uA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 uS wake-up time
1.5 uS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 16 kB Flash, 512 bytes SRAM
768 bytes of SRAM
0.9 V – 3.6 V operation
Features
Industry’s lowest active & sleep currents
160 uA / MHz - active mode
10 nA sleep w/BOD disabled
50 nA sleep w/BOD enabled
300 nA sleep w/internal RTC
600 nA sleep with external crystal
LDO voltage regulator
2 uS wake-up time
1.5 uS analog settling time
25 MHz, single-cycle 8051 compatible CPU
12-bit ADC
Up to 16 kB Flash, 512 bytes SRAM
768 bytes of SRAM
0.9 V – 3.6 V operation
