The MC100LVEL13DWR2 is a dual, fully differential 1:3 fanout buffer designed for clock signal distribution. It operates within a PECL mode voltage range of 3.0 V to 3.8 V and NECL mode with VEE ranging from -3.0 V to -3.8 V. The device features a typical propagation delay of 500 ps and an output-output skew of 50 ps, making it suitable for applications requiring precise timing. The buffer includes internal input pulldown resistors, ensuring stability under open input conditions, where the Q output defaults to LOW. It provides ESD protection exceeding 2 kV and meets JEDEC specifications for latchup testing. The operating temperature range is from -40¬8C to +85¬8C, and the device is compliant with RoHS standards, being both Pb-Free and Halogen Free. With a transistor count of 143, the MC100LVEL13DWR2 is packaged in a 20-lead SOIC format, making it a compact solution for engineers looking to implement reliable clock distribution in their designs.
Clock Fanout Buffer (Distribution) IC 1:3 20-SOIC (0.295", 7.50mm Width)
Clock Fanout Buffer (Distribution) IC 1:3 20-SOIC (0.295", 7.50mm Width)
| Quarktwin Technology Ltd. | |
|---|---|
| Product Category | Gate Drivers |
| Product Number | MC100LVEL13DWR2 |
| Product Name | Clock Buffers, Drivers |
| Output Configuration | Inverting |