Nexperia B.V. Level translating Fm+ I²C bus repeater/accelerator NCA9700DQJ

Description
The NCA9700 is a dual-channel bidirectional repeater for I²C and SMBus/PMBus applications. It targets the Fast-mode Plus (Fm+) of the I²C protocol, making the true 1 MHz operation possible without violating I²C timing specifications. This is achieved by using edge accelerators added at all NCA9700 ports that speed up the LOW-to-HIGH transitions of I²C input and output signals. The NCA9700 provides the buffering for both clock (SCL) and data (SDA) I²C signals with the voltage level translation possibility (up and down) at the same time. The unique feature of the IC is the same operating voltage range of 1.08 V to 3.6 V that can be applied at both port A and port B of the device. This offers more flexibility in how the device can be used in the target application. Multiple NCA9700s can be connected in series or in star, and their ports A and B can be exchanged. Only when the I²C clock stretching needs to be supported, the NCA9700 port A must be connected to the I²C Master side and the NCA9700 port B to the I²C Slave side. The NCA9700 features integrated pull-up resistors of 4.3 kΩ at each I/O pin. This simplifies the system implementation and reduces BOM count. Though external pull-up resistors are not required, they might be added to shorten the rise times of I²C signals even further. The NCA9700 provides true signal buffering as the device implementation does not use the pass-FET topology. No static or incremental offsets are needed either, and the lock-free operation is guaranteed by an innovative implementation of the buffers. The very low VOL levels on port A and B improve the noise margin in the application and the potential noise components of input signals are filtered out by Schmitt trigger inputs. To reduce EMI, the negative edges of output signals are slew-controlled. The NCA9700 is well suited for high-performance low-power applications which use the I²C communication protocol. Features and benefits Two-channel bidirectional I²C buffer Voltage level translation from 1.08 V to 3.6 V at both port A and port B with unconstrained combination of the supply voltage levels Guaranteed 1 MHz operation (true I²C Fast-mode Plus, Fm+) Support for the I²C Standard-mode (Sm) and Fast-mode (Fm) operation No static voltage offset Very low VOL on I/O pins of the port A; VOL regulated to 0.1VCCB on I/O pins of the port B Input and output rising-edge signal accelerators at all I/Os Active-HIGH enable input referenced to VCCA supply Lock-free operation Glitch-free and sequence-independent IC power-up Open-drain input/outputs Series connection and star connection of NCA9700 devices possible I²C clock stretching support Compatibility with I²C bus and SMBus protocols Latch-up performance exceeds 100 mA per JESD 78B Class II ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Very small footprint Applications Smart phones and tablets Portable medical devices Portable instrumentation and test equipment Devices for IoT applications Power-sensitive applications
Request a Quote Datasheet
Description
The NCA9700 is a dual-channel bidirectional repeater for I²C and SMBus/PMBus applications. It targets the Fast-mode Plus (Fm+) of the I²C protocol, making the true 1 MHz operation possible without violating I²C timing specifications. This is achieved by using edge accelerators added at all NCA9700 ports that speed up the LOW-to-HIGH transitions of I²C input and output signals. The NCA9700 provides the buffering for both clock (SCL) and data (SDA) I²C signals with the voltage level translation possibility (up and down) at the same time. The unique feature of the IC is the same operating voltage range of 1.08 V to 3.6 V that can be applied at both port A and port B of the device. This offers more flexibility in how the device can be used in the target application. Multiple NCA9700s can be connected in series or in star, and their ports A and B can be exchanged. Only when the I²C clock stretching needs to be supported, the NCA9700 port A must be connected to the I²C Master side and the NCA9700 port B to the I²C Slave side. The NCA9700 features integrated pull-up resistors of 4.3 kΩ at each I/O pin. This simplifies the system implementation and reduces BOM count. Though external pull-up resistors are not required, they might be added to shorten the rise times of I²C signals even further. The NCA9700 provides true signal buffering as the device implementation does not use the pass-FET topology. No static or incremental offsets are needed either, and the lock-free operation is guaranteed by an innovative implementation of the buffers. The very low VOL levels on port A and B improve the noise margin in the application and the potential noise components of input signals are filtered out by Schmitt trigger inputs. To reduce EMI, the negative edges of output signals are slew-controlled. The NCA9700 is well suited for high-performance low-power applications which use the I²C communication protocol. Features and benefits Two-channel bidirectional I²C buffer Voltage level translation from 1.08 V to 3.6 V at both port A and port B with unconstrained combination of the supply voltage levels Guaranteed 1 MHz operation (true I²C Fast-mode Plus, Fm+) Support for the I²C Standard-mode (Sm) and Fast-mode (Fm) operation No static voltage offset Very low VOL on I/O pins of the port A; VOL regulated to 0.1VCCB on I/O pins of the port B Input and output rising-edge signal accelerators at all I/Os Active-HIGH enable input referenced to VCCA supply Lock-free operation Glitch-free and sequence-independent IC power-up Open-drain input/outputs Series connection and star connection of NCA9700 devices possible I²C clock stretching support Compatibility with I²C bus and SMBus protocols Latch-up performance exceeds 100 mA per JESD 78B Class II ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Very small footprint Applications Smart phones and tablets Portable medical devices Portable instrumentation and test equipment Devices for IoT applications Power-sensitive applications
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Suppliers

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Product
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Level translating Fm+ I²C bus repeater/accelerator - NCA9700DQJ - Nexperia B.V.
Nijmegen, Netherlands
Level translating Fm+ I²C bus repeater/accelerator
NCA9700DQJ
Level translating Fm+ I²C bus repeater/accelerator NCA9700DQJ
The NCA9700 is a dual-channel bidirectional repeater for I²C and SMBus/PMBus applications. It targets the Fast-mode Plus (Fm+) of the I²C protocol, making the true 1 MHz operation possible without violating I²C timing specifications. This is achieved by using edge accelerators added at all NCA9700 ports that speed up the LOW-to-HIGH transitions of I²C input and output signals. The NCA9700 provides the buffering for both clock (SCL) and data (SDA) I²C signals with the voltage level translation possibility (up and down) at the same time. The unique feature of the IC is the same operating voltage range of 1.08 V to 3.6 V that can be applied at both port A and port B of the device. This offers more flexibility in how the device can be used in the target application. Multiple NCA9700s can be connected in series or in star, and their ports A and B can be exchanged. Only when the I²C clock stretching needs to be supported, the NCA9700 port A must be connected to the I²C Master side and the NCA9700 port B to the I²C Slave side. The NCA9700 features integrated pull-up resistors of 4.3 kΩ at each I/O pin. This simplifies the system implementation and reduces BOM count. Though external pull-up resistors are not required, they might be added to shorten the rise times of I²C signals even further. The NCA9700 provides true signal buffering as the device implementation does not use the pass-FET topology. No static or incremental offsets are needed either, and the lock-free operation is guaranteed by an innovative implementation of the buffers. The very low VOL levels on port A and B improve the noise margin in the application and the potential noise components of input signals are filtered out by Schmitt trigger inputs. To reduce EMI, the negative edges of output signals are slew-controlled. The NCA9700 is well suited for high-performance low-power applications which use the I²C communication protocol. Features and benefits Two-channel bidirectional I²C buffer Voltage level translation from 1.08 V to 3.6 V at both port A and port B with unconstrained combination of the supply voltage levels Guaranteed 1 MHz operation (true I²C Fast-mode Plus, Fm+) Support for the I²C Standard-mode (Sm) and Fast-mode (Fm) operation No static voltage offset Very low VOL on I/O pins of the port A; VOL regulated to 0.1VCCB on I/O pins of the port B Input and output rising-edge signal accelerators at all I/Os Active-HIGH enable input referenced to VCCA supply Lock-free operation Glitch-free and sequence-independent IC power-up Open-drain input/outputs Series connection and star connection of NCA9700 devices possible I²C clock stretching support Compatibility with I²C bus and SMBus protocols Latch-up performance exceeds 100 mA per JESD 78B Class II ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV Very small footprint Applications Smart phones and tablets Portable medical devices Portable instrumentation and test equipment Devices for IoT applications Power-sensitive applications

The NCA9700 is a dual-channel bidirectional repeater for I²C and SMBus/PMBus applications. It targets the Fast-mode Plus (Fm+) of the I²C protocol, making the true 1 MHz operation possible without violating I²C timing specifications. This is achieved by using edge accelerators added at all NCA9700 ports that speed up the LOW-to-HIGH transitions of I²C input and output signals.

The NCA9700 provides the buffering for both clock (SCL) and data (SDA) I²C signals with the voltage level translation possibility (up and down) at the same time. The unique feature of the IC is the same operating voltage range of 1.08 V to 3.6 V that can be applied at both port A and port B of the device. This offers more flexibility in how the device can be used in the target application. Multiple NCA9700s can be connected in series or in star, and their ports A and B can be exchanged. Only when the I²C clock stretching needs to be supported, the NCA9700 port A must be connected to the I²C Master side and the NCA9700 port B to the I²C Slave side.

The NCA9700 features integrated pull-up resistors of 4.3 kΩ at each I/O pin. This simplifies the system implementation and reduces BOM count. Though external pull-up resistors are not required, they might be added to shorten the rise times of I²C signals even further.

The NCA9700 provides true signal buffering as the device implementation does not use the pass-FET topology. No static or incremental offsets are needed either, and the lock-free operation is guaranteed by an innovative implementation of the buffers. The very low VOL levels on port A and B improve the noise margin in the application and the potential noise components of input signals are filtered out by Schmitt trigger inputs. To reduce EMI, the negative edges of output signals are slew-controlled.

The NCA9700 is well suited for high-performance low-power applications which use the I²C communication protocol.

Features and benefits

  • Two-channel bidirectional I²C buffer
  • Voltage level translation from 1.08 V to 3.6 V at both port A and port B with unconstrained combination of the supply voltage levels
  • Guaranteed 1 MHz operation (true I²C Fast-mode Plus, Fm+)
  • Support for the I²C Standard-mode (Sm) and Fast-mode (Fm) operation
  • No static voltage offset
  • Very low VOL on I/O pins of the port A; VOL regulated to 0.1VCCB on I/O pins of the port B
  • Input and output rising-edge signal accelerators at all I/Os
  • Active-HIGH enable input referenced to VCCA supply
  • Lock-free operation
  • Glitch-free and sequence-independent IC power-up
  • Open-drain input/outputs
  • Series connection and star connection of NCA9700 devices possible
  • I²C clock stretching support
  • Compatibility with I²C bus and SMBus protocols
  • Latch-up performance exceeds 100 mA per JESD 78B Class II
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV
  • Very small footprint

Applications

  • Smart phones and tablets
  • Portable medical devices
  • Portable instrumentation and test equipment
  • Devices for IoT applications
  • Power-sensitive applications
Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V.
Product Category IC Interfaces
Product Number NCA9700DQJ
Product Name Level translating Fm+ I²C bus repeater/accelerator
Features RoHS
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