Nexperia B.V. 8-bit serial-in/serial-out or parallel-out shift register; 3-state 74LV595D,112

Description
The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 3.6 V CMOS low power dissipation Direct interface with TTL levels Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C Has a shift register with direct clear Output capability: Parallel outputs; bus driver Serial output; standard Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to 85 °C and -40 °C to 125 °C Applications Serial-to-parallel data conversion Remote control holding register
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Description
The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 3.6 V CMOS low power dissipation Direct interface with TTL levels Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C Has a shift register with direct clear Output capability: Parallel outputs; bus driver Serial output; standard Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to 85 °C and -40 °C to 125 °C Applications Serial-to-parallel data conversion Remote control holding register
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Datasheet
Datasheet Summary
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The 74LV595D is an 8-bit serial-in/serial-out or parallel-out shift register featuring 3-state outputs and a storage register. It operates with a wide supply voltage range from 1.0 V to 3.6 V and is designed for low power dissipation, making it suitable for battery-operated devices. The device includes separate clocks for the shift and storage registers, allowing for efficient data handling. It features a serial input (DS) and a serial output (Q7S) for cascading multiple devices, along with an asynchronous reset (MR) input for easy initialization. The 74LV595D is compliant with JEDEC standards and offers robust ESD protection, exceeding 2000 V for HBM and 200 V for MM. It is specified for operation in temperatures ranging from -40 ¬8C to +125 ¬8C, making it suitable for a variety of applications, including serial-to-parallel data conversion and remote control holding registers. The device is available in a plastic small outline package (SO16) with 16 leads, facilitating easy integration into various circuit designs.

Datasheet Summary
Powered by GS/AI

The 74LV595D is an 8-bit serial-in/serial-out or parallel-out shift register featuring 3-state outputs and a storage register. It operates with a wide supply voltage range from 1.0 V to 3.6 V and is designed for low power dissipation, making it suitable for battery-operated devices. The device includes separate clocks for the shift and storage registers, allowing for efficient data handling. It features a serial input (DS) and a serial output (Q7S) for cascading multiple devices, along with an asynchronous reset (MR) input for easy initialization. The 74LV595D is compliant with JEDEC standards and offers robust ESD protection, exceeding 2000 V for HBM and 200 V for MM. It is specified for operation in temperatures ranging from -40 ¬8C to +125 ¬8C, making it suitable for a variety of applications, including serial-to-parallel data conversion and remote control holding registers. The device is available in a plastic small outline package (SO16) with 16 leads, facilitating easy integration into various circuit designs.

Suppliers

Company
Product
Description
Supplier Links
8-bit serial-in/serial-out or parallel-out shift register; 3-state - 74LV595D,112 - Nexperia B.V.
Nijmegen, Netherlands
8-bit serial-in/serial-out or parallel-out shift register; 3-state
74LV595D,112
8-bit serial-in/serial-out or parallel-out shift register; 3-state 74LV595D,112
The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. Features and benefits Wide supply voltage range from 1.0 V to 3.6 V CMOS low power dissipation Direct interface with TTL levels Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C Has a shift register with direct clear Output capability: Parallel outputs; bus driver Serial output; standard Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Complies with JEDEC standards JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8C (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Multiple package options Specified from -40 °C to 85 °C and -40 °C to 125 °C Applications Serial-to-parallel data conversion Remote control holding register

The 74LV595 is an 8-bit serial-in/serial or parallel-out shift register with a storage register and 3-state outputs. Both the shift and storage register have separate clocks. The device features a serial input (DS) and a serial output (Q7S) to enable cascading and an asynchronous reset MR input. A LOW on MR will reset the shift register. Data is shifted on the LOW-to-HIGH transitions of the SHCP input. The data in the shift register is transferred to the storage register on a LOW-to-HIGH transition of the STCP input. If both clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. Data in the storage register appears at the output whenever the output enable input (OE) is LOW. A HIGH on OE causes the outputs to assume a high-impedance OFF-state. Operation of the OE input does not affect the state of the registers. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC.

Features and benefits

  • Wide supply voltage range from 1.0 V to 3.6 V
  • CMOS low power dissipation
  • Direct interface with TTL levels
  • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C
  • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C
  • Has a shift register with direct clear
  • Output capability:
    • Parallel outputs; bus driver
    • Serial output; standard
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards
    • JESD8-7 (1.65 V to 1.95 V)
    • JESD8-5 (2.3 V to 2.7 V)
    • JESD8C (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Multiple package options
  • Specified from -40 °C to 85 °C and -40 °C to 125 °C

Applications

  • Serial-to-parallel data conversion
  • Remote control holding register
Supplier's Site Datasheet
Integrated Circuits (ICs) - Logic - Shift Registers - 1371373-74LV595D,112 - Win Source Electronics
Laguna Hills, CA, United States
Integrated Circuits (ICs) - Logic - Shift Registers
1371373-74LV595D,112
Integrated Circuits (ICs) - Logic - Shift Registers 1371373-74LV595D,112
Win Source Part Number: 1371373-74LV595D,112 Category: Integrated Circuits (ICs) - Logic - Shift Registers Temperature Range - Operating: -40°C ~ 125°C Fake Threat In the Open Market: 59 pct. MSL Level: 1 (Unlimited) Mfr: Nexperia USA Inc. Series: 74LV Package: Tube Product Status: Obsolete Package / Case: 16-SOIC (0.154", 3.90mm Width) Supplier Device Package: 16-SO Base Product Number: 74LV595 Mounting Type: Surface Mount HTSUS: 8542.39.0001 REACH Status: REACH Unaffected ECCN: EAR99 Function: Serial to Parallel, Serial Voltage - Supply: 1V ~ 3.6V Output Type: Tri-State Logic Type: Shift Register Number of Elements: 1 Number of Bits per Element: 8

Win Source Part Number: 1371373-74LV595D,112
Category: Integrated Circuits (ICs) - Logic - Shift Registers
Temperature Range - Operating: -40°C ~ 125°C
Fake Threat In the Open Market: 59 pct.
MSL Level: 1 (Unlimited)
Mfr: Nexperia USA Inc.
Series: 74LV
Package: Tube
Product Status: Obsolete
Package / Case: 16-SOIC (0.154", 3.90mm Width)
Supplier Device Package: 16-SO
Base Product Number: 74LV595
Mounting Type: Surface Mount
HTSUS: 8542.39.0001
REACH Status: REACH Unaffected
ECCN: EAR99
Function: Serial to Parallel, Serial
Voltage - Supply: 1V ~ 3.6V
Output Type: Tri-State
Logic Type: Shift Register
Number of Elements: 1
Number of Bits per Element: 8

Buy Now Datasheet
Shift Registers - 74LV595D,112 - ODG (Origin Data Global)
Shenzhen, China
Shift Registers
74LV595D,112
Shift Registers 74LV595D,112
IC SHIFT REGISTER 8BIT 16SOIC

IC SHIFT REGISTER 8BIT 16SOIC

Supplier's Site Datasheet
Shift Registers - 1727-4022-ND - DigiKey
Thief River Falls, MN, United States
Shift Registers
1727-4022-ND
Shift Registers 1727-4022-ND
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
 - 74LV595D,112 - Rochester Electronics
Newburyport, MA, United States
Serial In Parallel Out, LV/LV-A/LVX/H Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16

Serial In Parallel Out, LV/LV-A/LVX/H Series, 8-Bit, Right Direction, True Output, CMOS, PDSO16

Supplier's Site Datasheet
Shift Registers - 74LV595D,112 - Quarktwin Technology Ltd.
Shenzhen, Guangdong, China
Shift Registers
74LV595D,112
Shift Registers 74LV595D,112
Shift Shift Register 1 Element 8 Bit 16-SO

Shift Shift Register 1 Element 8 Bit 16-SO

Buy Now Datasheet
Integrated Circuits (ICs) - Logic - Shift Registers - 74LV595D,112 - Shenzhen Shengyu Electronics Technology Limited
Futian, China
Integrated Circuits (ICs) - Logic - Shift Registers
74LV595D,112
Integrated Circuits (ICs) - Logic - Shift Registers 74LV595D,112
IC SHIFT REGISTER 8BIT 16SOIC

IC SHIFT REGISTER 8BIT 16SOIC

Supplier's Site
Logic - Shift Registers - 74LV595D,112 - Lingto Electronic Limited
Shenzhen, China
Logic - Shift Registers
74LV595D,112
Logic - Shift Registers 74LV595D,112
IC SHIFT REGISTER 8BIT 16SOIC

IC SHIFT REGISTER 8BIT 16SOIC

Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V. Win Source Electronics ODG (Origin Data Global) DigiKey Rochester Electronics Quarktwin Technology Ltd. Shenzhen Shengyu Electronics Technology Limited Lingto Electronic Limited
Product Category Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers Shift Registers
Product Number 74LV595D,112 1371373-74LV595D,112 74LV595D,112 1727-4022-ND 74LV595D,112 74LV595D,112 74LV595D,112 74LV595D,112
Product Name 8-bit serial-in/serial-out or parallel-out shift register; 3-state Integrated Circuits (ICs) - Logic - Shift Registers Shift Registers Shift Registers Shift Registers Integrated Circuits (ICs) - Logic - Shift Registers Logic - Shift Registers
Register Type Serial In / Serial Out - Shift Right Serial In / Parallel Out Serial In / Parallel Out Serial In / Parallel Out Serial In / Parallel Out
Supply Voltage 1.2V; 1.5V; 1.8V; 2.5V; 3V; 3.3V; 3.6V; 1.0 - 3.6 1V ~ 3.6V 1V ~ 3.6V 1V ~ 3.6V 3.6V; 1V ~ 3.6V 3.6V
Output Characteristics 3-State Tri-State Tri-State 3-State 3-State; Tri-State
Features ESD Protection
Package Type Other; SO16 (SOT109-1) SOIC SOIC; Other; 16-SOIC (0.154", 3.90mm Width) SOIC; Other; "16-SOIC (0.154"", 3.90mm Width)" Other; SO16 SOIC; Other; 16-SOIC (0.154\", 3.90mm Width) SOIC
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