The 74HC4051; 74HCT4051 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultip
lexer applications. The switch features three digital select inputs (S0, S1 and S2), eight independent inputs/outputs (Yn), a common input/output (Z) and a digital enable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features and benefits
Wide analog input voltage range from -5 V to +5 V
CMOS low power dissipation
High noise immunity
Complies with JEDEC standards
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Low ON resistance:
80 Ω (typical) at VCC - VEE = 4.5 V
70 Ω (typical) at VCC - VEE = 6.0 V
60 Ω (typical) at VCC - VEE = 9.0 V
Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
Typical ‘break before make’ built-in
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
Analog multiplexing and demultiplexing
Digital multiplexing and demultiplexing
Signal gating
The 74HC4051; 74HCT4051 is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications. The switch features three digital select inputs (S0, S1 and S2), eight independent inputs/outputs (Yn), a common input/output (Z) and a digital enable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.
Features and benefits
- Wide analog input voltage range from -5 V to +5 V
- CMOS low power dissipation
- High noise immunity
- Complies with JEDEC standards
- JESD8C (2.7 V to 3.6 V)
- JESD7A (2.0 V to 6.0 V)
- Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
- Low ON resistance:
- 80 Ω (typical) at VCC - VEE = 4.5 V
- 70 Ω (typical) at VCC - VEE = 6.0 V
- 60 Ω (typical) at VCC - VEE = 9.0 V
- Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
- Typical ‘break before make’ built-in
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 °C to +85 °C and -40 °C to +125 °C
Applications
- Analog multiplexing and demultiplexing
- Digital multiplexing and demultiplexing
- Signal gating
