Nexperia B.V. Octal D-type flip-flop with reset; positive-edge trigger 74HC273PW-Q100J

The 74HC273-Q100; 74HCT273-Q100 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of V_CC.

This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.

Features and benefits

• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 2.0 V to 6.0 V
• CMOS low power dissipation
• High noise immunity
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)
• Input levels:
• For 74HC273-Q100: CMOS level
• For 74HCT273-Q100: TTL level
• Common clock and master reset
• Eight positive edge-triggered D-type flip-flops
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
• Multiple package options
• DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints

IC FF D-TYPE SNGL 8BIT 20TSSOP

74HC273 - Octal D-type flip-flop with reset; positive-edge trigger

IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP

IC FF D-TYPE SNGL 8BIT 20TSSOP