Nexperia B.V. 1-to-4 fan-out buffer 74AVC9112GTX

Description
The 74AVC9112 is a 1-to-4 fan-out buffer suitable for use in clock distribution. It has a data input (A), four data outputs (Yn) and an output enable input (OE). VCC can be supplied at any voltage between 0.8 V and 3.6 V. A HIGH on OEcauses all outputs to be pulled LOW via pull-down resistors, a LOW on OEdisconnects the pull-down resistors and enables all outputs. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range: VCC: 0.8 V to 3.6 V Inputs accept voltages up to 3.6 V Maximum data rates: 380 Mbit/s (3.3 V) 200 Mbit/s (2.5 V) 200 Mbit/s (1.8 V) 150 Mbit/s (1.5 V) 100 Mbit/s (1.2 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C
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Description
The 74AVC9112 is a 1-to-4 fan-out buffer suitable for use in clock distribution. It has a data input (A), four data outputs (Yn) and an output enable input (OE). VCC can be supplied at any voltage between 0.8 V and 3.6 V. A HIGH on OEcauses all outputs to be pulled LOW via pull-down resistors, a LOW on OEdisconnects the pull-down resistors and enables all outputs. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range: VCC: 0.8 V to 3.6 V Inputs accept voltages up to 3.6 V Maximum data rates: 380 Mbit/s (3.3 V) 200 Mbit/s (2.5 V) 200 Mbit/s (1.8 V) 150 Mbit/s (1.5 V) 100 Mbit/s (1.2 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C
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Suppliers

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Product
Description
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1-to-4 fan-out buffer - 74AVC9112GTX - Nexperia B.V.
Nijmegen, Netherlands
1-to-4 fan-out buffer
74AVC9112GTX
1-to-4 fan-out buffer 74AVC9112GTX
The 74AVC9112 is a 1-to-4 fan-out buffer suitable for use in clock distribution. It has a data input (A), four data outputs (Yn) and an output enable input (OE). VCC can be supplied at any voltage between 0.8 V and 3.6 V. A HIGH on OEcauses all outputs to be pulled LOW via pull-down resistors, a LOW on OEdisconnects the pull-down resistors and enables all outputs. Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. Features and benefits Wide supply voltage range: VCC: 0.8 V to 3.6 V Inputs accept voltages up to 3.6 V Maximum data rates: 380 Mbit/s (3.3 V) 200 Mbit/s (2.5 V) 200 Mbit/s (1.8 V) 150 Mbit/s (1.5 V) 100 Mbit/s (1.2 V) Latch-up performance exceeds 100 mA per JESD 78 Class II Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C

The 74AVC9112 is a 1-to-4 fan-out buffer suitable for use in clock distribution. It has a data input (A), four data outputs (Yn) and an output enable input (OE). VCC can be supplied at any voltage between 0.8 V and 3.6 V. A HIGH on OEcauses all outputs to be pulled LOW via pull-down resistors, a LOW on OEdisconnects the pull-down resistors and enables all outputs.

Schmitt trigger action at all inputs makes the circuit tolerant for slower input rise and fall time.

The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down.

Features and benefits

  • Wide supply voltage range:
    • VCC: 0.8 V to 3.6 V
  • Inputs accept voltages up to 3.6 V
  • Maximum data rates:
    • 380 Mbit/s (3.3 V)
    • 200 Mbit/s (2.5 V)
    • 200 Mbit/s (1.8 V)
    • 150 Mbit/s (1.5 V)
    • 100 Mbit/s (1.2 V)
  • Latch-up performance exceeds 100 mA per JESD 78 Class II
  • Complies with JEDEC standards:
    • JESD8-12 (0.8 V to 1.3 V)
    • JESD8-11 (0.9 V to 1.65 V)
    • JESD8-7 (1.2 V to 1.95 V)
    • JESD8-5 (1.8 V to 2.7 V)
    • JESD8-B (2.7 V to 3.6 V)
  • ESD protection:
    • HBM: ANSI/ESDA/JEDEC JS-001 class 3B exceeds 8000 V
    • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C
Supplier's Site Datasheet

Technical Specifications

  Nexperia B.V.
Product Category IC Interfaces
Product Number 74AVC9112GTX
Product Name 1-to-4 fan-out buffer
Device Type Buffer
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